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The output data range with DVO2(vout0) in DM8127

Dear All,

I am working with a custom board using DM8127 dsp. It's based on IPNC RDK v3.5. In system_dctrl.c, we use VPS_DC_CIG_CONSTRAINED_OUTPUT as the input node of VPS_DC_DVO2_BLEND. But we got the constrained output data since the digital value of Y is clipped to [16-235]. If we want to get the full range data of YPbPr from DVO2, how can we set in system_dctrl.c ?

Below is my settings:

links_m3vpss\system\system_dctrl.c:
Vps_DcConfig gSystem_dctrlTriDisplayConfig = {

    VPS_DC_USERSETTINGS,                                 /* Use Case */
    /* Edge information */

    {
     {VPS_DC_BP0_INPUT_PATH, VPS_DC_VCOMP_MUX}     ,
     {VPS_DC_VCOMP_MUX, VPS_DC_VCOMP},
     {VPS_DC_CIG_NON_CONSTRAINED_OUTPUT, VPS_DC_HDMI_BLEND},
     {VPS_DC_CIG_CONSTRAINED_OUTPUT, VPS_DC_DVO2_BLEND}     ,
     {VPS_DC_SEC1_INPUT_PATH, VPS_DC_SDVENC_MUX}    ,
     {VPS_DC_SDVENC_MUX, VPS_DC_SDVENC_BLEND}       ,
     {VPS_DC_GRPX0_INPUT_PATH, VPS_DC_HDMI_BLEND}   ,
     {VPS_DC_GRPX0_INPUT_PATH, VPS_DC_DVO2_BLEND}  ,
     {VPS_DC_GRPX2_INPUT_PATH, VPS_DC_SDVENC_BLEND},
    
     {VPS_DC_MAIN_INPUT_PATH, VPS_DC_VCOMP},
     {VPS_DC_AUX_INPUT_PATH, VPS_DC_VCOMP_MUX},
     {VPS_DC_BP1_INPUT_PATH, VPS_DC_SDVENC_MUX},    
    }

    ,
    12,
    /* VENC information */
    {
     /* Mode information */
     {
      {VPS_DC_VENC_HDMI, {FVID2_STD_1080P_60}
       }
      ,                                                    /* 1080p30 is mode
                                                            * is overwritten
                                                            * later inside
                                                            * System_displayCtrlInit
                                                            */
      {VPS_DC_VENC_DVO2, {FVID2_STD_1080P_60}
       }
      ,                                                    /* 1080p30 is mode
                                                            * is overwritten
                                                            * later inside
                                                            * System_displayCtrlInit
                                                            */
      {VPS_DC_VENC_SD, {FVID2_STD_NTSC}
       }
      }
     ,
     (VPS_DC_VENC_HDMI | VPS_DC_VENC_DVO2),                /* Tied VENC bit
                                                            * mask */
     3u                                                    /* Number of VENCs
                                                            */
     }
};

I will be very grateful if you can give me some hint for solving this problem.

  • Hi ,

    TRY:

     

    --- a/mcfw/src_bios6/links_m3vpss/system/system_dctrl.c

    +++ b/mcfw/src_bios6/links_m3vpss/system/system_dctrl.c

     

             dcCprocCfg.ciecamMode   = VPS_CPROC_CIECAM_MODE_SDTV_YUV_LIMITED_RGB_FULL;

     

    --- a/mcfw/src_linux/mcfw_api/ti_vdis.c

    +++ b/mcfw/src_linux/mcfw_api/ti_vdis.c

     

       pContext->deviceParams[SYSTEM_DC_VENC_HDMI].colorSpaceMode = VDIS_CSC_MODE_SDTV_GRAPHICS_Y2R;

  • Hi Eason,

    thanks for your quick reply.

    I can't find any definition of "VPS_CPROC_CIECAM_MODE_SDTV_YUV_LIMITED_RGB_FULL" with IPNC_RDK v3.5. What's the value in enum? Any ideas ?

    thanks

  • Hi, the macro I provided is from DVRRDK 4, whose HDVPSS driver is slightly differencet w/ IPNC RDK3.5

    If you have dvrrdk code already , then it should not difficult to migrate it from dvrrdk->ipncrdk.