How to register SPI driver for chip MX25L128

Bob,

Please refer to the below wiki page:

http://processors.wiki.ti.com/index.php/TI81XX_PSP_McSPI_Driver_User_Guide

SPI Flash information is available in following structure in file arch/arm/mach-omap2/board-ti8168evm.c (for TI816X) and arch/arm/mach-omap2/board-ti8148evm.c (for TI814X). This structure should be modified to support a SPI flash. The example structure given here supports most of the SPI flashes, check drivers/mtd/devices/m25p80.c for support for the new SPI flash. The string constants .modalias and .type depend on device names provided in the slave driver (in our case m25p32.c). The .type string here selects W25X32 SPI flash, which has to be modified in case of new SPI flash.

Check if drivers/mtd/devices/m25p80.c support the new SPI flash. If it is not supported then the new SPI flash device information has to be added to the m25p_ids[] list.

Regards,
Pavel

Hi Pavel,

There is no info for mx25l12835e in the m25p_ids[].

That is to say, I have to add our SPI flash device info to the m25p_ids[].

But I don't know what _jedec_id and  _ext_id mean.

INFO(_jedec_id, _ext_id, _sector_size, _n_sectors, _flags)

BR

Bob

Bob,

It should be:

static const struct spi_device_id m25p_ids[] = {

/* Macronix */
    { "mx25l4005a",  INFO(0xc22013, 0, 64 * 1024,   8, SECT_4K) },
    { "mx25l8005",   INFO(0xc22014, 0, 64 * 1024,  16, 0) },
    { "mx25l3205d",  INFO(0xc22016, 0, 64 * 1024,  64, 0) },
    { "mx25l6405d",  INFO(0xc22017, 0, 64 * 1024, 128, 0) },
    { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
    { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
    { "mx25l12835e", INFO(0xc22018, 0, 64 * 1024, 256, 0) },

0xC22018 is the RDID:

manufacture ID = 0xC2
memory type = 0x20
memory density = 0x18

See the MX25L12835E datasheet:

http://www.mymectronic.com/datasheet/11015_MX25L12835EMI-10G.pdf

You can compare with the MX25L12855E and MX2512805D datasheets:

http://www.zlgmcu.com/mxic/pdf/Safe_Flash/MX25L6455E_MX25L12855E_DS_EN.pdf

http://www.zlgmcu.com/mxic/pdf/nor_flash_c/mx25l12805d_ds_en.pdf

Regards,
Pavel

Hi Pavel,

Got it .Thank you.

Then should I do the next step below ?

const struct flash_platform_data ti8148_spi_flash = {
 //.type  = "w25x32",
 .type  ="mx25l12835e",
 .name  = "spi_flash",
 .parts  = ti8148_spi_partitions,
 .nr_parts = ARRAY_SIZE(ti8148_spi_partitions),
};

Is it right ? And is there anything else to be set?

BR

Bob

Bob,

bob lee said:

const struct flash_platform_data ti8148_spi_flash = {
 //.type  = "w25x32",
 .type  ="mx25l12835e",

This is right.

bob lee said:

And is there anything else to be set?

struct spi_board_info __initdata ti8148_spi_slave_info[] = {
    {
        .modalias    = "m25p80",
        .platform_data    = &ti8148_spi_flash,
        .irq        = -1,
        .max_speed_hz    = 75000000,
        .bus_num    = 1,
        .chip_select    = 0,
    },
};

The DM814x EVM use the first SPI controller to connect to the W25X32 SPI flash. If you use other (not the first one) SPI controller to connect to the MX25L12835E SPI flash, you should change .bus_num value.

The DM814x EVM use Chip Select (CS) 0 for the W25X32 SPI flash. You should change the .chip_select value if you use other CS for the MX25L12835E.

http://processors.wiki.ti.com/index.php/TI81XX_PSP_McSPI_Driver_User_Guide#Porting_to_custom_hardware

• bus_num Bus number identifies the SPI controller instance to which the SPI slave is connected. Numbering starts with '1'. Hence should use 1 for the first SPI controller. Please check the EVM schematic to identify the bus number to which your SPI slave is connected. On TI816X and TI814X EVM, it is the first SPI controller to which the SPI flash is connected.
• chip_select chip select number for this SPI slave (0 on TI81XX EVMs)

Ensure all pins required for SPI operation are muxed correctly (especially if using GPIO for CS)

You should also modify the partition layout of your SPI flash if it does not match the default one:

http://processors.wiki.ti.com/index.php/TI81XX_PSP_McSPI_Driver_User_Guide#Supporting_SPI_Flashes

/* SPI fLash information */
struct mtd_partition ti8148_spi_partitions[] = {
    /* All the partition sizes are listed in terms of erase size */
    {
        .name        = "U-Boot-min",
        .offset        = 0,    /* Offset = 0x0 */
        .size        = 32 * SZ_4K,
        .mask_flags    = MTD_WRITEABLE, /* force read-only */
    },
    {
        .name        = "U-Boot",
        .offset        = MTDPART_OFS_APPEND, /* 0x0 + (32*4K) */
        .size        = 64 * SZ_4K,
        .mask_flags    = MTD_WRITEABLE, /* force read-only */
    },
    {
        .name        = "U-Boot Env",
        .offset        = MTDPART_OFS_APPEND, /* 0x40000 + (32*4K) */
        .size        = 2 * SZ_4K,
    },
    {
        .name        = "Kernel",
        .offset        = MTDPART_OFS_APPEND, /* 0x42000 + (32*4K) */
        .size        = 640 * SZ_4K,
    },
    {
        .name        = "File System",
        .offset        = MTDPART_OFS_APPEND, /* 0x2C2000 + (32*4K) */
        .size        = MTDPART_SIZ_FULL, /* size ~= 1.1 MiB */
    }
};

Regards,
Pavel

Hi Pavel,

Based on your reply,the setting is completed.

Do I need to configure the menuconfig ?And how to test the driver for mx25l12835e?

BR

Bob

Bob,

bob lee said:

Do I need to configure the menuconfig ?

If you use the DM814x config file (ti8148_evm_defconfig), it should configure the SPI. Make sure you are aligned with:

http://processors.wiki.ti.com/index.php/TI81XX_PSP_McSPI_Driver_User_Guide#SPI_Support

bob lee said:

And how to test the driver for mx25l12835e?

You can try read/write to the MX25L12835E SPI flash chip. See also:

http://processors.wiki.ti.com/index.php/TI81XX_PSP_McSPI_Driver_User_Guide#Validating_SPI_Support

Best regards,
Pavel

Hi Pavel,

According to the TRM,The pin SPI_D[0] and SPI_D[1] can be configured as either input or output (MOSI or MISO).

Would you please tell how to configure in the kernel code ?

Thank you

Bob

Hi Pavel,

According to the TRM,The pin SPI_D[0] & SPI_D[1] can be configured as either input or output (MOSI or MISO).

Would you please tell me how to configure ?

Thank you

Bob

Bob,

For a pin to function as an input (or bidirectional), the corresponding PINCNTL register bit [18] RXACTIVE should be 1.

See also DM814x datasheet, Table 4-11. PINCNTL1 – PINCNTL270 (PINCNTLx) Registers Bit Descriptions and DM814x Silicon Errata, Advisory 2.1.87 Control Module, Pin Configuration (PINCNTLx), 3.3 V Mode Operation: Reduction in Power-On Hours May Occur if the Input Receiver is Disabled

Example with DCAN pin:

#define TI814X_INPUT_EN            (1 << 18)

static void ti814x_d_can_init(unsigned int instance)
{
    omap_mux_init_signal("dcan0_tx.dcan0_tx", 0);
    omap_mux_init_signal("dcan0_rx.dcan0_rx", TI814X_INPUT_EN | TI814X_PULL_UP);
    d_can_hw_raminit(instance);
    platform_device_register(&ti814x_d_can0_device);
}

Regards,
Pavel

Hi Pavel,

Is it right?

 omap_mux_init_signal("spi0_d0", 0);                                // spi0_d0 as "MOSI"
 omap_mux_init_signal("spi0_d1", TI814X_INPUT_EN);   // spi0_d1 as "MISO"

BR

Bob

Bob,

You should better check the values from user space, after kernel is up. You can use the devmem2 tool and see if bit [18] value is what you expected.

Regards,
Pavel

Hi Pavel,

The value is 0x00060001.Is it right?

BR

Bob

Hi Bob,

This value means that bit [18] is 1, which means that the pin associated with this register is input (or bidirectional).

Regards,
Pavel

Hi Pavel,

But I don't know how to make sure the chip could work.

Only SCLK pin has wave.

BR

Bob

Bob,

The below wiki page has instruction for how to validate SPI:

http://processors.wiki.ti.com/index.php/TI81XX_PSP_McSPI_Driver_User_Guide#Validating_SPI_Support

Use the MTD interface provided for SPI flash on the EVM to validate the SPI driver interface.

Regards,
Pavel

Hi Pavel,

Our spi flash chip is mx25l12805d,but it failed to detect its id.I don't know why.Need your help.Thank you.

Please refer to the below picture.

Hello Bob,

I just wanted to make you aware that Macronix considers the MX25L12835E to be obsolete and is not recommended for new designs.  The new device is: MX25L12835F.  Here is a link to an application note covering the migration from MX25L12835E to MX25L12835F:

http://www.macronix.com/Lists/ApplicationNote/Attachments/714/AN0177V3-MGRT_MX25L12836E_45E_35E%20to%2035F.pdf

Here is a summary taken directly from the application note:

"The MX25L12835F is backwards compatible with most of the common commands and features of the earlier E versions. Additionally, the supported package types have identical footprints and nearly identical pinout definitions. A more detailed analysis should be done if “special” functions such as: Hold, Continuous Program Mode, Double Transfer Rate Fast Reads (available on MX25L12845E only), or individual sector or block protection is used. If common features are used in standard traditional modes, the replacement will only need minimal software modification."

The good news is the the RDID's are identical and the MX25L12835F can be added to the spi_device_id table as follows:

static const struct spi_device_id m25p_ids[] = {

/* Macronix */
{ "mx25l4005a", INFO(0xc22013, 0, 64 * 1024, 8, SECT_4K) },
{ "mx25l8005", INFO(0xc22014, 0, 64 * 1024, 16, 0) },
{ "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, 0) },
{ "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, 0) },
{ "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
{ "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256, 0) },
{ "mx25l12835e", INFO(0xc22018, 0, 64 * 1024, 256, 0) },
{ "mx25l12835f", INFO(0xc22018, 0, 64 * 1024, 256, 0) },

Best regards,

Rick Culver

Hi Rick,

I just saw your post,thanks for your info.

And I am busy with the spi flash reading & writing application program.But I really don't know how to handle.

Could you give me some advice ?

Thank you.

Bob

Hi Bob,

Are you planing to use a flash file system such as YAFFS or JFFS, or do you intend to read/write directly to flash? Your choice will make a big difference the amount of code you need to write.

As for advice, if you are planning to use serial flash to store frequently updated data, endurance should be considered.  Here is a link to an technical note related to NOR flash enduance and data retention:

http://www.macronix.com/Lists/ApplicationNote/Attachments/750/AN0291V2-ProgramErase%20Cycling%20Endurance%20and%20Data%20Retention%20in%20NOR%20Flash%20Memories.pdf

The following link covers wear leveling:

http://www.macronix.com/Lists/ApplicationNote/Attachments/666/AN033_Ap%20Note%20for%20Wear%20Leveling.pdf

If you are using the serial flash for code storage, endurance and data retention will not be issues to worry about.

I hope this helps.

-Rick

Hi Rick,

 I want to read/write directly to spi flash by address.

For more information,pls let me know.

Thank you .

Bob