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McASP4 clock configuration

Other Parts Discussed in Thread: TVP5158

Hi all,

I have connected the I2S ports of tvp5158 to McASP4 ports of DM8148. I choose DVRRDK_04.00.00.03 as my development environment. My questions:

Can the McASP4 work in slave mode? Does the McASP4 of DM8148 supports to receive the digital audio signals? How to configure the clock of McASP4 if it supports? Whether the clock of McASP4 is transmit clock or receive clock? Does the McASP4 generates the clock or receives clock from external chip?

I appreciate any help of anyone.

  • Hi Tery,

    I have no view over the DVR RDK, so I will comment from the McASP HW side:

    Tery lee said:
    Can the McASP4 work in slave mode?

    Yes, McASPx can work in slave mode.

    http://processors.wiki.ti.com/index.php/TI81XX_PSP_AUDIO_Driver_User_Guide

    McASP is configured as slave and AIC31 Codec is configured as master.

    http://processors.wiki.ti.com/index.php/TI81xx_PSP_Porting_Guide#Audio_driver_.28McASP.29

    McASP2 on the TI81xx EVMs operates in a slave mode (codec driving the bit clock and the frame sync) and hence nothing specific handling is needed.

    Tery lee said:
    Does the McASP4 of DM8148 supports to receive the digital audio signals?


    Yes, McASP can receive digital audio, see DM814x TRM:

    Although intercomponent digital audio interface reception (DIR) mode (that is, S/PDIF stream receiving) is
    NOT natively supported by the MCASP module, a specific TDM mode implementation for the MCASP
    receivers allows an easy connection to external DIR components (for example, S/PDIF to I2S format
    converters).

    Features of the McASP include: Glueless connection to audio analog-to-digital converters (ADC), digital-to-analog converters (DAC), codec, digital audio interface receiver (DIR), and S/PDIF transmit physical layer components.

    384-slot TDM with external digital audio interface receiver (DIR) device.
    – For DIR reception, an external DIR receiver integrated circuit should be used with I2S output format and connected to the McASP receive section.

    Receive section supports: TDM stream of 384 time slots specifically designed for easy interface to external digital interface receiver (DIR) device transmitting DIR frames to McASP using the I2S protocol (one time slot for each DIR subframe).

    Figure 16-2 through Figure 16-6 show examples of McASP usage in digital audio encoder/decoder systems.

    Digital audio interface transmit. The McASP supports transmitting in S/PDIF format on up to all data pins
    configured as outputs.

    Tery lee said:
    How to configure the clock of McASP4 if it supports?

    Tery lee said:
    Whether the clock of McASP4 is transmit clock or receive clock?

    Tery lee said:
    Does the McASP4 generates the clock or receives clock from external chip?

    See DM814x TRM, section 16.2.2 Clock and Frame Sync Generators

    Regards,
    Pavel

  • Hi Pavel,

    Thanks for your reply. I find that McASP4 doesn't have ports for receiving clock, so if I want to receive clock signal from external chip(tvp5158), how to configure the McASP4 registers?

  • Tery,

    McASP has receive and transmit section, which can be configured to be independent from each other. See DM814x TRM, chapter 16 McASP, section 16.2.10 Setup and Initialization


    Also, there is example for the DM814x EVM McASP2 with AIC3106 audio codec. See the example C code from the Mistral web site, aic3106:

    Introduction
    -------------
    This text document accompanies the CCS test code for testing AIC3106 Audio codec
    on DM814X EVM Board. It provides a brief of the methodology of the test and  
    the procedure for executing the same.
     
    Overview
    ---------
    This CCS test application configures the McASP2 on the DM814X EVM board and  
    also the AIC3106 for the following.
    1. Playback on head phones
    2. Playback on Line-Out
    3. Record from Microphone and playback on Head-phones
    4. Record from Line-In and playback on Head-phones
     
    The test application executes in the above mentioned sequence. The Audio codec is
    configured to record and playback at 48 KHz sampling. The Codec is kept as I2S  
    master with the Bit-clock & Frame-sync being input the McASP.

    Best regards,
    Pavel