Hi,
can anyone from TI can please test NAND boot mode on DM8148-EVM with this branch
http://arago-project.org/git/projects/?p=u-boot-omap3.git;a=shortlog;h=refs/heads/ti81xx-master
Thanks & Regards
Mike
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Hi,
can anyone from TI can please test NAND boot mode on DM8148-EVM with this branch
http://arago-project.org/git/projects/?p=u-boot-omap3.git;a=shortlog;h=refs/heads/ti81xx-master
Thanks & Regards
Mike
Hi,
When I use the prebuilt images from the release I can read NAND from the SD boot mode, but if I build it from source it doesnt, should some additional config needs to enabled ?
U-Boot 2010.06 (Nov 02 2012 - 18:39:35)
TI8148-GP rev 2.1
ARM clk: 600MHz
DDR clk: 400MHz
DRAM: 2 GiB
MMC: OMAP SD/MMC: 0
Using default environment
The 2nd stage U-Boot will now be auto-loaded
Please do not interrupt the countdown till TI8148_EVM prompt if 2nd stage is already flashed
Hit any key to stop autoboot: 0
reading u-boot.bin
182048 bytes read
## Starting application at 0x80800000 ...
U-Boot 2010.06 (Nov 02 2012 - 18:40:57)
TI8148-GP rev 2.1
ARM clk: 600MHz
DDR clk: 400MHz
I2C: ready
DRAM: 2 GiB
NAND: HW ECC BCH8 Selected
256 MiB
MMC: OMAP SD/MMC: 0
.:;rrr;;.
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,A@@@hi;;;r5;;;;r;rrSG@@@A,
r@@#i;:;s222hG;rrsrrrrrr;ri#@@r
:@@hr:r;SG3ssrr2r;rrsrsrsrsrr;rh@@:
B@H;;rr;3Hs;rrr;sr;;rrsrsrsrsrsr;;H@B
@@s:rrs;5#;;rrrr;r#@H:;;rrsrsrsrsrr:s@@
@@;;srs&X#9;r;r;;,2@@@rrr:;;rrsrsrsrr;;@@
@@;;rrsrrs@MB#@@@@@###@@@@@@#rsrsrsrsrr;;@@
G@r;rrsrsr;#X;SX25Ss#@@#M@#9H9rrsrsrsrsrs;r@G
@9:srsrsrs;2@;:;;:.X@@@@@H::;rrsrsrsrsrsrr:3@
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@#;rsrsrsrsrr;r2ir@@@###::rrsrsrsrsrsrsrsrsr:@@
@A:rrsrsrsrr;:2@29@@M@@@;:;rrrrsrsrsrsrsrsrs;H@
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@#:rrsrsrsr;G@5Hr25@@@#@@@#9XG9s:rrrrsrsrsrs:#@
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@@:rrsrsrsr;S@rrrsr;:;r3MH@@#@M5,S@@irrsrr:@@
@A:rrsrsrsrrrrrsrsrrr;::;@##@r:;rH@h;srr:H@
;@9:rrsrsrsrrrsrsrsrsr;,S@Hi@i:;s;MX;rr:h@;
r@B:rrrrsrsrsrsrsrr;;sA@#i,i@h;r;S5;r:H@r
,@@r;rrrsrsrsrsrr;2BM3r:;r:G@:rrr;;r@@,
B@Mr;rrrrsrsrsr@@S;;;rrr:5M;rr;rM@H
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.A@@#5r;;;r;;;rrr;r:r#AsM@@H.
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:ihM#@@@@@##hs,
Net: Detected MACID:0:18:32:63:1d:26
cpsw
Hit any key to stop autoboot: 0
TI8148_EVM#nand read 0x81000000 0x20000 0x40000;
NAND read: device 0 offset 0x20000, size 0x40000
262144 bytes read: OK
TI8148_EVM#
Thanks & Regards
Mike
Mike,
I download the u-boot from:
http://arago-project.org/git/projects/?p=u-boot-omap3.git;a=shortlog;h=refs/heads/ti81xx-master
snapshot -> u-boot-omap3-bf748749971aa67c4f86b6b64d073f8d08435e64.tar.gz -> u-boot-omap3/
In u-boot-omap3 folder, there are no pre-built images! I build 1st and 2nd stage bootloaders for UART boot (u-boot.min.uart and u-boot.bin). The UART boot is working fine. Now I will build 1st and 2nd stage bootloaders for NAND boot (u-boot.min.nand and u-boot.bin) and write them in NAND flash from UART. I will let you know the result.
Regards,
Pavel
Hi Pavel,
Thank you very much for your effort and time!
I was referring prebuilt images from http://software-dl.ti.com/dsps/dsps_public_sw/psp/LinuxPSP/TI81XX_04_04/04_04_00_02/index_FDS.html
Thanks & Regards
Mike
Mike,
Regarding http://arago-project.org/git/projects/?p=u-boot-omap3.git;a=shortlog;h=refs/heads/ti81xx-master
I successfully boot my DM814x EVM (PG2.1) from NAND.
First I boot the DM814x EVM from UART and flash the NAND:
Net: <ethaddr> not set. Reading from E-fuse
Detected MACID:90:d7:eb:d5:13:96
cpsw
Hit any key to stop autoboot: 0
TI8148_EVM#mw.b 0x81000000 0xFF 0x20000
TI8148_EVM#loady 0x81000000
## Ready for binary (ymodem) download to 0x81000000 at 115200 bps...
C
*** file: u-boot.min.nand
sx -vv u-boot.min.nand
Sending u-boot.min.nand, 759 blocks: Give your local XMODEM receive command now.
Xmodem sectors/kbytes sent: 0/ 0kRetry 0: NAK on sector
Bytes Sent: 97280 BPS:6375
Transfer complete
*** exit status: 0
xyzModem - CRC mode, 761(SOH)/0(STX)/0(CAN) packets, 3 retries
## Total Size = 0x00017bc8 = 97224 Bytes
TI8148_EVM#nand erase 0x0 0x20000
NAND erase: device 0 offset 0x0, size 0x20000
Erasing at 0x0 -- 100% complete.
OK
TI8148_EVM#nand write.i 0x81000000 0x0 0x20000
NAND write: device 0 offset 0x0, size 0x20000
131072 bytes written: OK
TI8148_EVM#mw.b 0x81000000 0xFF 0x60000
TI8148_EVM#loady 0x81000000
## Ready for binary (ymodem) download to 0x81000000 at 115200 bps...
C
*** file: u-boot.bin
sx -vv u-boot.bin
Sending u-boot.bin, 1462 blocks: Give your local XMODEM receive command now.
Xmodem sectors/kbytes sent: 0/ 0kRetry 0: NAK on sector
Bytes Sent: 187264 BPS:5576
Transfer complete
*** exit status: 0
xyzModem - CRC mode, 1464(SOH)/0(STX)/0(CAN) packets, 3 retries
## Total Size = 0x0002db24 = 187172 Bytes
TI8148_EVM#nand erase 0x20000 0x60000
NAND erase: device 0 offset 0x20000, size 0x60000
Erasing at 0x60000 -- 100% complete.
OK
TI8148_EVM#nand write.i 0x81000000 0x20000 0x60000
NAND write: device 0 offset 0x20000, size 0x60000
393216 bytes written: OK
TI8148_EVM#
Then I power OFF the board, configure the boot switch pins for NAND boot (10010) and boot successful:
picocom v1.4
port is : /dev/ttyUSB1
flowcontrol : none
baudrate is : 115200
parity is : none
databits are : 8
escape is : C-a
noinit is : no
noreset is : no
nolock is : no
send_cmd is : sx -vv
receive_cmd is : rz -vv
Terminal ready
U-Boot 2010.06 (Oct 17 2014 - 16:33:14)
TI8148-GP rev 2.1
ARM clk: 600MHz
DDR clk: 400MHz
DRAM: 1 GiB
DCACHE: Off
NAND: HW ECC BCH8 Selected
256 MiB
Using default environment
The 2nd stage U-Boot will now be auto-loaded
Please do not interrupt the countdown till TI8148_EVM prompt if 2nd stage is already flashed
Hit any key to stop autoboot: 0
NAND read: device 0 offset 0x20000, size 0x40000
262144 bytes read: OK
## Starting application at 0x81000000 ...
U-Boot 2010.06 (Oct 17 2014 - 16:34:42)
TI8148-GP rev 2.1
ARM clk: 600MHz
DDR clk: 400MHz
I2C: ready
DRAM: 1 GiB
DCACHE: On
NAND: HW ECC BCH8 Selected
256 MiB
MMC: OMAP SD/MMC: 0
*** Warning - bad CRC or NAND, using default environment
.:;rrr;;.
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,A@@@hi;;;r5;;;;r;rrSG@@@A,
r@@#i;:;s222hG;rrsrrrrrr;ri#@@r
:@@hr:r;SG3ssrr2r;rrsrsrsrsrr;rh@@:
B@H;;rr;3Hs;rrr;sr;;rrsrsrsrsrsr;;H@B
@@s:rrs;5#;;rrrr;r#@H:;;rrsrsrsrsrr:s@@
@@;;srs&X#9;r;r;;,2@@@rrr:;;rrsrsrsrr;;@@
@@;;rrsrrs@MB#@@@@@###@@@@@@#rsrsrsrsrr;;@@
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@9:srsrsrs;2@;:;;:.X@@@@@H::;rrsrsrsrsrsrr:3@
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:@s;rsrsrsrr:M#Msrr;;&#@@@@@@@@@@H@@5;rsrsr;s@,
@@:rrsrsrsr;S@rrrsr;:;r3MH@@#@M5,S@@irrsrr:@@
@A:rrsrsrsrrrrrsrsrrr;::;@##@r:;rH@h;srr:H@
;@9:rrsrsrsrrrsrsrsrsr;,S@Hi@i:;s;MX;rr:h@;
r@B:rrrrsrsrsrsrsrr;;sA@#i,i@h;r;S5;r:H@r
,@@r;rrrsrsrsrsrr;2BM3r:;r:G@:rrr;;r@@,
B@Mr;rrrrsrsrsr@@S;;;rrr:5M;rr;rM@H
.@@@i;;rrrrsrs2i;rrrrr;r@M:;i@@@.
.A@@#5r;;;r;;;rrr;r:r#AsM@@H.
;&@@@@MhXS5i5SX9B@@@@G;
:ihM#@@@@@##hs,
Net: <ethaddr> not set. Reading from E-fuse
Detected MACID:90:d7:eb:d5:13:96
cpsw
Hit any key to stop autoboot: 0
TI8148_EVM#
I can also check with this release if you need? But I think the result will be the same.
Regards,
Pavel
mike A said:can you please share the binaries ?
UART binaries: 1663.u-boot.min.uart
NAND binaries: 3835.u-boot.min.nand
P.S. the u-boot.bin is the same for UART and NAND boot, only 1st stage bootloader is different.
Regards,
Pavel
Hi,
Its the issue of the compiler (probably unaligned memory access) try the one which TI suggest https://developer.ridgerun.com/wiki/index.php/Code_Sourcery_ARM_toolchain_2009q1-203 and that should fix your issue.
Thanks,
--Prabhakar Lad
Hi Prabhakar,
Yes it works fine with this cross-compiler I am able to read from NAND in SD boot mode without any issues and also able to flash and boot from NAND.
What exactly is the issue on the compiler stuff ? are there any fixes ?
Thanks & Regards,
Mike
Mike,
mike A said:What exactly is the issue on the compiler stuff ? are there any fixes ?
The EZSDK (which contains the PSP linux kernel and u-boot) work only with this CodeSourcery cross sompiler:
http://www.ti.com/tool/linuxezsdk-davinci
CodeSourcery Lite gcc tool chain
http://software-dl.ti.com/dsps/dsps_public_sw/ezsdk/latest/index_FDS.html
4. CodeSourcery GCC Toolchain Installation
4.1 Download the CodeSourcery GCC toolchain from the link provided below (use the IA32 GNU/Linux Installer).
4.2 Execute the installer on the host with a .bin file extension as follows:
./arm-2009q1-203-arm-none-linux-gnueabi.bin
4.3 Follow the installer instructions on the screen to do a Typical installation.
4.4 There is no need to read the Code Sourcery Getting Started Guide at this time. You can read it later if necessary.
http://www.mentor.com/embedded-software/sourcery-tools/sourcery-codebench/overview/
See also the below links:
http://processors.wiki.ti.com/index.php/TI81XX_PSP_User_Guide#Toolchain
http://processors.wiki.ti.com/index.php/EZSDK_Feature_List
http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/t/252033.aspx
http://e2e.ti.com/support/embedded/linux/f/354/t/137357.aspx
Regards,
Pavel
Hi Pavel,
It works fine with the codesourcery toolchain.
Any ideas why it doesn't work when I build the compiler from the crosstool-ng ? is it something related to unaligned memory access as Prabhkar mentioned ?
Thanks & Regards,
Mike
Mike,
I am not familiar with the crosstool-ng, I can provide you the below pointers:
http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/t/325116.aspx
http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/t/252033.aspx
http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/p/112322/399869.aspx#399869
http://e2e.ti.com/support/embedded/linux/f/354/t/322543.aspx
http://e2e.ti.com/support/embedded/linux/f/354/t/222387.aspx
Regards,
Pavel
Hi Mike,
I have found a fix which should work with you crosstool-ng gcc version 4.7 and higher, see the following diff,
diff --git a/arch/arm/cpu/arm_cortexa8/config.mk b/arch/arm/cpu/arm_cortexa8/config.mk
index 7f9b171..8dd96c6 100644
--- a/arch/arm/cpu/arm_cortexa8/config.mk
+++ b/arch/arm/cpu/arm_cortexa8/config.mk
@@ -20,7 +20,7 @@
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
-PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
+PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float -mno-unaligned-access
# Make ARMv5 to allow more compilers to work, even though its v7a.
PLATFORM_CPPFLAGS += -march=armv7-a
Let me know if that still doesn’t work, now you should be able to read write NAND flash from SD boot mode.
Thanks,
--Prabhakar Lad