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emac and phy reset sequence

Guru 20755 points

Hello,

I would please like to verify the correct sequence for emac & phy reset.

As I understand it should be as following:

1. activate phy reset (set phy into non-active mode and then set phy into active mode)

2. activate emac reset

Is that correct ?

Thanks for your feedback,

Ran

  • Ran,

    Ran S. said:

    I would please like to verify the correct sequence for emac & phy reset.

    As I understand it should be as following:

    1. activate phy reset (set phy into non-active mode and then set phy into active mode)

    2. activate emac reset

    Where you have found these exact sequence? I have check the DM814x TRM, and I can not find such sequence, see 9.2.1.14 Software Reset and 9.3.4 Initialization and Configuration of CPSW (5. Apply Soft Reset to 3PSW Subsystem, CPSW_3G, CPGMAC_SL1/2, and CPDMA)

    Regards,
    Pavel

  • Typically a phy doesn't need to be reset explicitly during boot; in fact I would recommend against doing it unless you encounter specific problems that require it.  Typically a phy will begin link detection and auto-negotiation immediately after power-on reset, so resetting the phy during early boot would interrupt this process and possibly risk confusing the device you're connected to.

    Also, if you have both external ports connected via the ethernet switch subsystem, then — even without ethernet reset isolation — you can reboot the board without connected devices noticing any loss of connectivity (other than some brief packet loss) provided you quickly configure the switch subsystem again during early boot.  However, if you reset the PHYs then it's like you pulled out the plugs and put them back in, so there will be a noticable networking interruption.

    My initialization procedure for the Ethernet switch subsystem (which so far has never given any issues) is:

    1. ensure clocks have been set up (including SATA PLL)
    2. configure GMII_SEL in control module
    3. enable ethernet through PRCM
    4. configure pinmux in control module
    5. configure both MII modules (called "MAC slivers" by TI docs)
      1. at least MACCONTROL needs to be set correctly
      2. the source MAC address of each port should be copied from the control module (MAC_ID0 to SL1_SA, MAC_ID1 to SL2_SA), although my impression is that this is only used for pause frames and not terribly important.  (note that the SLx_SA registers are located in the switch module rather than in the MII modules)
    6. (optional) enable MDIO controller and configure PHY settings
      1. I do this because I didn't like the defaults for the link/activity leds
    7. configure and enable switch
      1. the only steps strictly necessary are clearing and enabling the ALE (via ALE_CONTROL), and setting the port states to forwarding (via ALE_PORTCTLx).
      2. you may first configure other settings in the switch or ALE if you have an opinion about them.
      3. enable stats via CPSW_STAT_PORT_EN.  everybody likes stats.

    and that's it, you should have a working switch.  if and when software wishes to communicate via the network itself it should also configure the subsystem wrapper and CPDMA submodule but that's a separate matter.