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Tiler Implementation in IPNC RDK 3.8 Full feature with 4 streams (H.264)

Hi,

My Usecase for 4 channel H.264 is as follows:


When I apply Tiler, first 2 streams (1920x1080 & 960x544), which passes from Scaler 0 and scaler 1 - are rotating fine, it rotates on 90 degree and 270 degree.

But, Other 2 streams (720x480 & 640x480) not rotating properly, which passes from DEI0 and DEI1, as you shown in below picture.


For Tiler Enable In Rules.make file, I do following :

# TILER Memory enable
IPNC_TILER_ENABLE := YES
CAMERA_TILER_ENABLE  := YES
BTE_ENABLE := NO

config_512M_tiler.bld (Changes are following) - Where I Modify config_512_tiler.bld file to reduce TILER_SIZE and increse SR2_FRAME_BUFFER_SIZE.

/* second 256MB */
var TILER_SIZE                 = 160*MB; /* Reducing this to fix Vid Frame Alloc failures. Need to fix */ /* MUST be aligned on 128MB boundary */
var SR2_FRAME_BUFFER_SIZE      = 73*MB;  
var SR0_SIZE                   = 16*MB;

Is There an Issue of DEI ? Please suggest on this.

Regards,

Sandip Gokani

  • Waiting for your reply.

    - Sandip Gokani.

  • I will notify the IPNC RDK team for help.

    BR
    Pavel
  • Waiting for your reply.

    - Sandip Gokani.
  • Hi Sadip,


    Please verify the video before DEI and confirm that its fine. You can dump the video and verify it.

    Please check the below useful links, Its discusses the similar issue.

    http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/p/358958/1268046

    http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/p/317283/1104584

    Regards,

    Mahesh

  • Hi,

    I checked your link as you given for reference, but not getting succeed to resolve my problem.

    Sometimes I got Assertion like..

    [m3video]  172040: Assertion @ Line: 313 in links_common/ipcBitsOut/ipcBitsOutLink_tsk.c: SYSTEM_IPC_BITS_GET_BUFSTATE(pListElem->bufState) == IPC_BITBUF_STATE_FREE : failed !!!

    or

    [m3vpss ]  710159: Assertion @ Line: 657 in links_common/ipcFramesOut/ipcFramesOutLink_tsk.c: SYSTEM_IPC_FRAMES_GET_BUFSTATE(pListElem->bufState) == IPC_FRAMEBUF_STATE_FREE : failed !!!

    Can you Tell me, because of which reason I got Assertion? So I can Focus on it..

    waiting for your reply.

    Regards,

    Sandip.

  • Hi,

    Assertion is on control....

    But I am Waiting for your reply on Tiler Issue.

    Please reply soon..

    Regards,

    Sandip.

  • Hi,

     

    Your use case diagram shown YUV422I input to the DEI links.

    Is this correct? Can you check this?

     

    regards,

    Anand

  • Hi Anand,
    Actually Mistake in diagram only. Not in code.
    DUP gives YUV420, which sends to DEI0 and DEI1.
  • Hi,

     

    The current implementation of the DEI link doesn't support handling of the input Real Time (RT) params.

    Any dynamic change in the input resolution is not supported.

    When you rotate 1920x1080 input by 90 degrees the resolution is dynamically changed to 1080x1920 but the DEI link will still treat the input as 1920x1080.

    We need to add support for handling the input RT params in the DEI link and provide you the patch.

    I can provide the patch by end of next week.

    However, the scaler link suports input RT params you still need to change the output resolutions manually by calling the 'Vcam_setScalarOutResolution()' API otherwise it continues to scale to the original output resolution.

    For eg if scaler input is 1920x1080 and output is 720x480.

    After rotation the input becomes 1080x1920 but output is still 720x480 now it does scaling from 1080x1920 to 720x480.

    So you need to call the Vcam_setScalarOutResolution() API to change the output resolution to 480x720.

     

    regards,

    Anand

  • Thanks Anand for your reply.

    Please send a patch ASAP. Waiting for it.

    Thanks once again.

    Regards,

    Sandip Gokani.

  • Hi,

     

    Pl. find the ipnc_rdk patch to support RT params in DEI link attached.

    I have created an API on A8 namely 'Vcam_setDeiOutResolution()' which you can use to change the DEI output resolution.

     

    regards,

    Anand

    Jan2915_DEI_RT_params.zip

  • Hi Anand,

    Sorry for late reply....

    Your patch is working fine..My Issue about tiler is resolved now.

    Thanks a lot for your kindly support.

    Regards,

    Sandip Gokani.

  • Hi,

     

    Can you pl. mark the thread as answered?

     

    regards,

    Anand

  • Hi Anand,

    Sorry to Interrupt You...I have one more query regarding Tiler Module..

    I implemented video masking for all my 4 H264 channels, & thats why I had given a system control of video masking to Camera Driver & It was working fine. (Tiler is off from Rules.make file)

    But when Tiler is on from Rules.make file, & When I give a system control for enable to video masking to camera driver, streaming has been stopped.

    Please solve My Issue..

    Pelase review a code of VideoMasking in camera driver..

    Int32 CameraLink_drvProcessData(CameraLink_Obj * pObj)
    {
        .................

        for (streamId = 0; streamId < CAMERA_LINK_MAX_OUTPUT_PER_INST; streamId++)
        {
            /*
             * Deque frames for all active handles
             */
            FVID2_dequeue(pObj->fvidHandleVipAll,
                          &frameList, streamId, BIOS_NO_WAIT);

            if (frameList.numFrames)
            {
                for (frameId = 0; frameId < frameList.numFrames; frameId++)
                {
                    pFrame = frameList.frames[frameId];

                    ...................

                    /* Sentry360 Start */
                    if( pObj->pmInfo.pmEnable )
                    {
                        PM_processFrames( pFrame , &pObj->pmInfo );
                    }

    .........................

    Void PM_processFrames( FVID2_Frame * pFrame , PM_infoStruct *pPmInfo )
    {
            Ptr FrameAddrY,FrameAddrUV;
            UInt32 maskAddr,colorId;
            Iss_CaptRtParams *pRtParams;
            UInt32 pitch,width,height;
            UInt32 pmId,startX,startY;

            pRtParams       = (Iss_CaptRtParams *) pFrame->perFrameCfg;
            pitch           = pRtParams->captureOutPitch;

            FrameAddrY      = (Ptr) pFrame->addr[0][0];
            FrameAddrUV = (Ptr) pFrame->addr[0][1];

            for ( pmId = 0 ; pmId < MAX_PRIVACY_REGION ; pmId++ )
            {
                    if( TRUE == pPmInfo->rectInfo[pmId].enable )
                    {
                            if ( pPmInfo->pcolor < PM_COLOR_TYPE_MAX )
                                    colorId = pPmInfo->pcolor;
                            else
                                    colorId = PM_COLOR_BLACK;

                            startX          = DRAW_floor( ( pPmInfo->rectInfo[pmId].startX * (pRtParams->captureOutWidth) )/1920 , 8);
                            startY          = DRAW_floor( ( pPmInfo->rectInfo[pmId].startY * (pRtParams->captureOutHeight) )/1080 , 2);

                            maskAddr        = (UInt32) FrameAddrY + ( startX + ((startY) * (pitch)));
                            width   = DRAW_align( ((pPmInfo->rectInfo[pmId].width) * (pRtParams->captureOutWidth))/ 1920 , 8);
                            height  = DRAW_align( ((pPmInfo->rectInfo[pmId].height) * (pRtParams->captureOutHeight))/ 1080 , 2);

                            if( !(width && height) )
                            {
                                    continue;
                            }

                            if ( width > (pRtParams->captureOutWidth) )
                            {
                                    width = DRAW_align((pRtParams->captureOutWidth), 8);
                            }
                            if ( height > (pRtParams->captureOutHeight) )
                            {
                                    height = DRAW_align((pRtParams->captureOutHeight), 2);
                            }

                            /* Y-plan */
                            DM81XX_EDMA3_memset( DRAW_EDMA_CHID_DRAW,
                                            DRAW_EDMA_QUEUEID_DRAW,
                                            gColorInfo[colorId][0],
                                            maskAddr,
                                            width,
                                            height,
                                            pitch );

                            maskAddr        = (UInt32) FrameAddrUV + ( startX + ((startY/2) * (pitch)));
                            /* UV-plan */
                            DM81XX_EDMA3_memset( DRAW_EDMA_CHID_DRAW,
                                            DRAW_EDMA_QUEUEID_DRAW,
                                            gColorInfo[colorId][1],
                                            maskAddr,
                                            width,
                                            height/2,
                                            pitch );
                    }
            }
    }

    Is there any Issue of EDMA Copy When Tiler is On?

     

    Regards,

    Sandip Gokani

  • Hi,

     

    You have to make the following changes:

    • Pass CPU address to the EDMA by calling 'Utils_tilerAddr2CpuAddr()' fn. Refer to the ..\ipnc_rdk\ipnc_mcfw\mcfw\src_bios6\links_m3vpss\swosd\swosdLink_tsk.c file for reference.
    • The pitches for Y and UV planne are 16384 and 32768 respectively.The Y pitch will work for EDMA but the UV pitch of 32768 will not work since the EDMA BIDX is 16 bit field with the range -32768 to +32767. In this case you can do EDMA copy from end to the beginning using the pitch -32768.
    • In order to do the EDMA copy in reverse direction using the pitch -32768 you need to take the following change:

    In the file '..\ipnc_rdk\ipnc_mcfw\mcfw\src_bios6\links_m3vpss\system\system_m3vpss_edma.c' change line # 193,194 as shown below:

        *((volatile unsigned int *) (PaRAMEntryAddr + SRC_DST_BIDX)) =
            (dstLineOffset << 16) | (srcLineOffset & 0xFFFF);

     

    regards,

    Anand

  • Hi Anand,

    Thanks for quick reply.

    I changed all your suggestions,  I resolve an issue of stop streaming...

    Camera is running continuously.

    But My Video Mask problem is still there....There is no effect of Video Masking of selected area.

    Code changes : Into Function "PM_processFrames" (As describe earlier for your reference)

    FrameAddrY      = (Ptr) ((UInt32)pFrame->addr[0][0] + ( startX + ((startY) * (pitch))));

    FrameAddrY      = (Ptr)Utils_tilerAddr2CpuAddr((UInt32)FrameAddrY);

    maskAddr        = (UInt32) FrameAddrY;

     /* Y-plan */

    DM81XX_EDMA3_memset( DRAW_EDMA_CHID_DRAW,
                                            DRAW_EDMA_QUEUEID_DRAW,
                                            gColorInfo[colorId][0],
                                            maskAddr,
                                            width,
                                            height,
                                            pitch );

    FrameAddrUV     = (Ptr) ((UInt32)pFrame->addr[0][1] + ( startX + ((startY/2) * (pitch))));

    FrameAddrUV     = (Ptr)Utils_tilerAddr2CpuAddr((UInt32)FrameAddrUV);

    maskAddr        = (UInt32) FrameAddrUV;

    /* UV-plan */
    DM81XX_EDMA3_memset( DRAW_EDMA_CHID_DRAW,
                    DRAW_EDMA_QUEUEID_DRAW,
                    gColorInfo[colorId][1],
                     maskAddr,
                     width,
                     height/2,
                     pitch );

    Screen Shot:

    You Can see "Green" lines at top of the screen.

    Regards,

    Sandip Gokani.

  • Hi,

    When you use tiled memories the pitch for Y and UV planes are different (16384 and 32768 respectively).

    For UV plane memset you have to do EDMA memset from end to start using pitch = -32768.

    regards,

    Anand

  • Hi Anand,

    In order to do the EDMA copy in reverse direction using the pitch -32768, I change in following file as you suggested me already.

    file '..\ipnc_rdk\ipnc_mcfw\mcfw\src_bios6\links_m3vpss\system\system_m3vpss_edma.c' change line # 193,194 as shown below:

        *((volatile unsigned int *) (PaRAMEntryAddr + SRC_DST_BIDX)) =
            (dstLineOffset << 16) | (srcLineOffset & 0xFFFF);

    Same Issue, Camera Running (streaming) very well but Effect of Video Masking not observed.

    I do 2 changes in 2 files as you suggested me. Same Result as I described you my earlier reply by snapshot and code.

    Regards,

    Sandip Gokani.

  • Hi,

    I am sorry, there is some gap here ...

    • For Y plane the pitch is 16384 which is supported by the EDMA engine.Make sure your Y plane pitch is 16384 for tiled memory.
    • But for UV plane the pitch is 32768 which is not supported by EDMA engine.You have to copy the UV plane from the end to start using the pitch of -32768 as shown below:

                         /* UV-plan */

    /* End of UV plane */

    maskAddr += (((height/2 - 1) * pitch) + width);


                            DM81XX_EDMA3_memset( DRAW_EDMA_CHID_DRAW,
                                            DRAW_EDMA_QUEUEID_DRAW,
                                            gColorInfo[colorId][1],
                                            maskAddr,
                                            width,
                                            height/2,
                                            -pitch );

    • Make sure the UV pitch is 32768. In order to make the above copy code to work there is small fix in the EDMA driver code which i provided in my last post (line # 193,194 in '..\ipnc_rdk\ipnc_mcfw\mcfw\src_bios6\links_m3vpss\system\system_m3vpss_edma.c').

    regards,

    Anand

  • Hi Anand,

    Thanks for your feedback.

    It works with negative value of pitch, but I got some offset because of "maskAddr" calculation. I tried out to change calculation as you can see below (but it was just tring to find out solution, but still not succeed....There is some OffSet)

    Code for your reference :

    FrameAddrUV     = (Ptr) ((UInt32)pFrame->addr[0][1] + ( startX + ((startY/2) * pitch[1])));
    FrameAddrUV     = (Ptr)Utils_tilerAddr2CpuAddr((UInt32)FrameAddrUV);
    maskAddr        = (UInt32) FrameAddrUV;

    maskAddr += (((height/2 - 1) * pitch[1]) + (width/16));

    /* UV-plan */
    DM81XX_EDMA3_memset( DRAW_EDMA_CHID_DRAW,
                    DRAW_EDMA_QUEUEID_DRAW,
                    gColorInfo[colorId][1],
                    maskAddr,
                     width,
                     height/2,
                   -pitch[1] );

    Snapshort :

    Please, If possible then help me on calculation of Maskaddress.

    Regards,

    Sandip Gokani

  • Hi,

    Why are dividing width by 16 while calculating the end UV plane address?

    maskAddr += (((height/2 - 1) * pitch[1]) + (width/16));

    regards,

    Anand

  • Hi Anand,

    Its just to get for solution & for that I am trying to modified calculation on trial base. I know its not a perfect calculation.

    But, As per your suggestion on earlier reply, with following calculation --> There is a big offset.

    maskAddr += (((height/2 - 1) * pitch) + width);

    Snapshot for above calculation :

    So, I just tried to reduce a offset with dividing width by 16. I also tried with dividing width by 32, but same a small offset is remaining there.

    It is possible to provide me a perfect calculation for MaskAddr for UV plan?

    My earlier calculation is :

    FrameAddrUV     = (Ptr) ((UInt32)pFrame->addr[0][1] + ( startX + ((startY/2) * pitch[1])));
    FrameAddrUV     = (Ptr)Utils_tilerAddr2CpuAddr((UInt32)FrameAddrUV);
    maskAddr        = (UInt32) FrameAddrUV;

    maskAddr += (((height/2 - 1) * pitch[1]) + (width/16));          [Please change the calculation]

    /* UV-plan */
    DM81XX_EDMA3_memset( DRAW_EDMA_CHID_DRAW,
                    DRAW_EDMA_QUEUEID_DRAW,
                    gColorInfo[colorId][1],
                    maskAddr,
                     width,
                     height/2,
                   -pitch[1] );

    Regards,

    Sandip Gokani

     

  • Hi Anand,

    Its just to get for solution & for that I am trying to modified calculation on trial base. I know its not a perfect calculation.

    But, As per your suggestion on earlier reply, with following calculation --> There is a big offset.

    maskAddr += (((height/2 - 1) * pitch) + width);

    Snapshot for above calculation :

    So, I just tried to reduce a offset with dividing width by 16. I also tried with dividing width by 32, but same a small offset is remaining there.

    It is possible to provide me a perfect calculation for MaskAddr for UV plan?

    My earlier calculation is :

    FrameAddrUV     = (Ptr) ((UInt32)pFrame->addr[0][1] + ( startX + ((startY/2) * pitch[1])));
    FrameAddrUV     = (Ptr)Utils_tilerAddr2CpuAddr((UInt32)FrameAddrUV);
    maskAddr        = (UInt32) FrameAddrUV;

    maskAddr += (((height/2 - 1) * pitch[1]) + (width/16));     [Please change the calculation]

    /* UV-plan */
    DM81XX_EDMA3_memset( DRAW_EDMA_CHID_DRAW,
                    DRAW_EDMA_QUEUEID_DRAW,
                    gColorInfo[colorId][1],
                    maskAddr,
                     width,
                     height/2,
                   -pitch[1] );

    Regards,

    Sandip Gokani

  • Hi,

    OK, got it.The EDMA copy doesn't happen in reverse direction in Horizontal direction.

    So the correct address calculation is:

    maskAddr += ((height/2 - 1) * pitch[1]);

     

    regards,

    Anand

  • Anand,

    Thanks a lot, Issue is resolved.

    Regards,
    Sandip Gokani
  • Hi Anand,

    As per your above reply regarding to Tiler Implementation, I called a function 'Vcam_setScalarOutResolution()' to set a output resolution after Tiler set 90 degree.

    There is one issue for stream 1, i.e. 1920x1080 resolution.

    I tried to applied Tiler with 90 degree & then set Resolution with 1080x1920, but there is an encoder errors.

    [m3video] ENCLINK:ERROR in Enclink_h264EncodeFrameBatch.Status[-1] for IVAHD_0
     [m3video] 7659:WARN
     [m3video] ENC : IVAHDID : 0 ENCLINK:ERROR in EncLink_SubmitBatch.Status[-1]
     [m3video] Extended error 4000c480 for reqObjIndex 0
     [m3video] 7693:WARN

    Else, for other resolution, like tried to change 720x480 to 480x720 after 90 degree rotation, its working fine..

    Can you solve above query regarding higher resolution?

    Regards,

    Sandip