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V4l2 Interlaced Capture Merging issue

Hello

Using DM 814x to capture interlaced video source. Our Requirement is V4l2 should merge both the top and bottom field and deliver single frame. We are trying to use

below is the IOCTL command we use in V4l2 driver in the function ti81xxvin_vps_create().

storageparams.chNum = 0;
  storageparams.bufferFmt = FVID2_BUF_FMT_FRAME;
  storageparams.fieldMerged = 1;
  ret = (inst->captctrl->control(inst->captctrl,
     IOCTL_VPS_CAPT_SET_STORAGE_FMT,
     (void *)&storageparams, NULL)); 

Result: Merged frame is incorrect in the way that it appears Top field from the second frame is used to merge with rest of the bottom fields always instead of merging top field and bottom field corresponding to each frame. And because of this I think the first frame captured is Correctly merged, however the rest of the frames are merged with the first frame.

Please find the attached pictures of first 3 merged frames from V4l2 Capture. Can you please provide us some details why this problem could appear and suggestions on how to resolve this? If needed please let us know any specific logs you need.

1st: Merged Correctly

2nd: Incorrectly Merged

3rd: Incorrectly merged

  • Hello,

    Can someone please provide some info on this?

    Trying to capture interlaced video in a buffer, first Frame is captured properly, however other frames are not captured properly instead of capturing full frame in a buffer only one field is captured in a FRAME format.

    thanks

    Prakash

  • Hello,

    You could check this thread:

    Hope it helps.

    BR
    Margarita

  • Thanks Margarita for your reply.

    I have referred to the thread, however I am still not get properly merged frames in a single buffer. First few frames are captured with correctly merging fields into Frames in a single buffers. However few other frames are captured as fields with line interleaved in a frame format without merging fields.

    Please find attached picture for your reference. Can you please provide some inputs? Why only few frames in the beginning are merged properly but not all fields are merged correctly.

    Next Frame not Merged properly.

    thanks

    Prakash

  • Dear Margarita

    Can you please provide some feedback on this issue? Why first few frames are merged properly but not all Frames are merged correctly? The behavior is random

    Once StreamON is done first few frames received correctly merged and then get field in frames format missing alternate fields.

    Thanks

    Prakash

  • Hi Prakash,

    When you see this issue, can you try to reset the VIP port and see if it recovers?

    As such, we have not see this issue. it should work as long as the decoder is sending field in correct order. If decoder sends fields in incorrect order, you will see incorrectly merged fields, so can you also check if the source is is correct? decoder is sending out fields correctly? 

    Rgds,

    Brijesh

  • Thanks Brijesh for your reply.

    This issue is random V4l2 would not know which frame is merged correctly and which does not hence resetting VIP when this issue happens is difficult.

    When V4l2 is configured to capture Fields , all fields are captured correctly. Its only when v4l2 is configured to deliver merged frames in a single buffer, some frames are merged correctly and some are not.

    if SET_STORAGE_FMT IOCtl is configured to capture fields without merging, all fields are capture correctly .

    storageparams.chNum = 0;
      storageparams.bufferFmt = FVID2_BUF_FMT_FIELD;
      storageparams.fieldMerged = 0;
      ret = (inst->captctrl->control(inst->captctrl,
         IOCTL_VPS_CAPT_SET_STORAGE_FMT,
         (void *)&storageparams, NULL));

    if it is changed to capture merged frame in single buffer as below that's when some frames merged correctly and some are not as attached video frames in previous update. Please let me know if there any other configuration needs to be done, or any debug points.

    // Configuration for field merge

    storageparams.chNum = 0;
      storageparams.bufferFmt = FVID2_BUF_FMT_FRAME;
      storageparams.fieldMerged = 1;
      ret = (inst->captctrl->control(inst->captctrl,
         IOCTL_VPS_CAPT_SET_STORAGE_FMT,
         (void *)&storageparams, NULL));

    Thanks

    Prakash

  • Hi Prakash,

    Can you set the buffer fmt to INTERLACED_FMT?

    How do you know that the interlaced fields are captured correctly when format is set to FMT_FIELD? Did you check field of the received fields and made sure that it is always alternating? If not, can you first please do this experiment and make sure source is providing correct field id every time? This experiment will tell if source itself is ok or not..

    This kind of issues mostly comes FID in source is going out of order. you need to first make sure that the source is good and consistently providing alternating FID.

    Regards,
    Brijesh
  • Thanks Brijesh for your reply.

    Can you please provide some more details on what you mean by try  " Can you set the buffer fmt to INTERLACED_FMT? "

    there are only two options available either FMT_FIELD or FMT_FRAME. Please provide some info INTERLACED_FMT?

    enum FVID2_BUFFER_FMT {
     FVID2_BUF_FMT_FIELD = 0,
     /**< Buffers are captured/displayed as fields instead of frames */
     FVID2_BUF_FMT_FRAME,
     /**< Buffers are captured/displayed as frames instead of frames */
    } ;

    Thanks

    Prakash

  • oh ok, just set to FMT_FRAME.

    Rgds,
    Brijesh
  • Hi,

    We are also facing similar issue.

    We used FMT_FRAME and still this random field merging issue exists.

    Let us know how this issue can be solved.

    Regards,
    Geetha
  • HI Getha,

    Are you using Embedded sync or Discrete sync for interlaced mode detection?
    From my debugging I found out that the root cause of this issue is that, TI Chip is not able to detect ODD and EVEN fields correctly, hence it is not able to merge the fields to single frame. I also noticed that there are couple of Hardware Errata which affect Davinci Chip Ver 3.0 which are related to issues in Hardware Chip related to interlace mode detection.

    you can take a look at (www.ti.com/.../sprz343c.pdf)

    thanks
    Prakash
  • HI Getha,

    Are you using Embedded sync or Discrete sync for interlaced mode detection?
    From my debugging I found out that the root cause of this issue is that, TI Chip is not able to detect ODD and EVEN fields correctly, hence it is not able to merge the fields to single frame. I also noticed that there are couple of Hardware Errata which affect Davinci Chip Ver 3.0 which are related to issues in Hardware Chip related to interlace mode detection.

    you can take a look at (www.ti.com/.../sprz343c.pdf)

    thanks
    Prakash
  • Hi Prakash,

    We are using embedded sync for interlace mode.

    Let us know if you had any method to overcome or any solution for this issue on DM8168 Processor.

    Regards,
    Geetha
  • HI Geetha
    Unfortunately I could not find any solution myself for this problem.

    thanks
    Prakash