Hi,
I'd posted an earlier question around a consumer device, based on the DM814x, and the boot sequence. It is configured to boot from NOR (XIP) initially, and I was trying to determine if I could alter the sequence to boot from the available SD cage. There was no good way to do this other than to stop the NOR from booting so that the sequence would continue on to the SD card. Well, I managed to do that, but not on purpose. So now I've got a brick, but I still have hope that I can restore the original NOR image (I was smart enough to copy that first). The obvious device to try is the SD card. I don't know that I have any available UART connections, so that is not a consideration yet.
I've spent a few weeks reading TRMs, looking at EZSDK and CCS, and I've reached a point where I still have a few questions that would help me to know if I'm on the right track, or if my current approach is a waste of time.
So what I am attempting to do first, is just verify that the SD card is, in fact, a device the unit is trying to boot from (I wish they had little activity LEDs!). I'd like to assume it's attached to SD/MMC1, which is on the boot list, but not sure if that is the case. The display on my unit is blank, so I have no immediately obvious visual signs of life. What I do have, is every 3 minutes, consistent with the watchdog timer, the display cycles through what appears to be a reset (grey/black/grey). So, if I can simply alter the behavior of the the WDT (turn off using the sequence from the manual, or change the interval), or reset the device myself, via the SD card, then I know the SD is a valid boot device and I can proceed with a more complete fix.
So my questions are:
At a high level, how does the processor know that it is successfully booted? Ie. how does it decide that it needs to try the next device? Is there a register which holds a value when booting is successfully completed? Is this separate from the WDT? The reason for asking is I am wondering if it is trying anything in the boot list beyond the NOR, or if it may think the NOR has "booted".
I am trying to keep the SD approach simple by using raw mode. I am getting a better understanding of the TOC, etc. from several examples online. Is anything beyond a null CHSETTINGS element required?
From older documentation of other processors, the understanding I get is that the TOC can be used to configure other elements, such as RAM. Does anything need to be done to configure memory to load the raw startup image?
Building on the previous question, are any memory locations valid without additional configuration? 0x402F0400 - 0x402FFFFF and 0x40300000 - 0x4031FFFF seem to be viable memory locations. Are they working and available, or are they in use by the ARM ROM?
I'm trying a couple of short programs in CCS to either disable the WDT or invoke an early system reset to see if I can have an impact on the unit's display. Any other suggestions to check for proof of life on the SD front? I imagine writing some bytes back to the SD (a la "hello world") might require too extensive of a program. I'm just trying to check for signs of life.
All help and suggestions are appreciated. Thanks.
Chris
