DaVinci™ Video Processors

Browse by Tags

DaVinci™ Video Processors

Welcome to the DaVinci™ Video Processors Section of the TI E2E Support Community. Ask questions, share knowledge, explore ideas, and help solve problems with fellow engineers. To post a question, click on the forum tab then "New Post".

Sign In to Post
Tags
You have subscribed to this tag. To view or manage your tag subscriptions, click here.   Close
You have unsubscribed from this tag. To view or manage your tag subscriptions, click here.   Close
You are currently viewing:
GPMC
Related Posts

  • Forum Post: Questions using GPMC to interface with Spansion NOR without nAVD/ALE line

    tan jr
    Hi, The board I'm using: I'm using the DM816x/C6A816x/AM389x Evaluation Module (EVM). The board interface with a daughter board (816x/389x EXPANSION I/O DAUGHTER CARD). Confusion: I'm trying to use GPMC to interface with the Spansion NOR (S29GL512P11TFI010) on the daughter board...
    on Nov 29, 2011

  • Forum Post: Re: DM8148 GPMC Series Resistors

    ScottB
    Michael, GPMC may not run as fast as say, DDR2 or DDR3 but, our main concern here is the fast edge rates of the signals. Depending on your design and board stack-up, you may not need them. But, I prefer the ability to tweak the circuit if need be to reduce the ringing effects of impedance mismatch...
    on Dec 7, 2011

  • Forum Post: Re: GPMC can't map to external NOR flash on DM8148

    Viet Dinh
    Eric, I would recommend to take out your own code and try again to see if it is still work. Also compare the GPMC registers before and after adding your code. Fromm the GPMC_CONFIG7_i, the map address is corrected. BR, Viet
    on Dec 22, 2011

  • Forum Post: Re: 16-bit boot NOR flash interfacing in A/D mode

    Viet Dinh
    Hi IIandre, Could you give us your GPMC_ registers setting? If GPMC_CONFIG bit 1 (LIMITEDADDRESS) is 1, then please change it to 0. BR, Viet
    on Jan 9, 2012

  • Forum Post: Re: DM814x: Why the GPMC data bus keep the previous value after Nor flash read opertion

    Viet Dinh
    Chris, Could you give us the customer GPMC configuration? This is one of the configuration that work for our customer: .gpmc_nor_config.GpmcClkDivider == 0; .gpmc_nor_config.TimeParaGranularity == 0; .gpmc_nor_config.DeviceSize == device_size; .gpmc_nor_config.MuxAddData == 0x0; .gpmc_nor_config...
    on Jan 31, 2012

  • Forum Post: Re: GPMC_CLK always active on DM8147

    Viet Dinh
    Victor, I am little confused with the 64MHz you are talking about in here. The PLL_L3 is running at 200MHz in DM8148. If you set the GPMCFCLKDIVIDER to 1 then the GPMC will be running at 100 MHz. What did you do to get it at 64 MHz? Please note that the max GPMCCLK is spec at 100 MHz. So if PLL_L3...
    on Feb 2, 2012

  • Forum Post: Re: GPMC_CLK always active on DM8147

    Viet Dinh
    Victor, You can make GPMC_FCLK to run at same as PLL_L3 by setting the GPMCFCLKDIVIDER to 0. If you use asynchronous mode, I believe the GPMC_CLK will be alway running. The clkout0 can run only as fast as PLL_L3 which is 200 MHz for DM8148 but the GPMC_CLK can run only up to 100 MHz. So, if...
    on Feb 9, 2012

  • Forum Post: Re: GPMC_CLK always active on DM8147

    Viet Dinh
    Anthony, You are right, the async mode GPMC_CLK run only when data transfer. The GPMC_CLK always run in sync mode only. Sorry for a mislead earlier. BR, Viet
    on Feb 17, 2012

  • Forum Post: Re: GPMC_CLK always active on DM8147

    Viet Dinh
    Victor, The GPMC_FCLK is running at 1/2 PLL_L3 clock so to improve the GPMC interface, try to configure the PLL_L3 as close as 200MHz. BR, Viet
    on Feb 29, 2012

  • Forum Post: Re: GPMC_CLK always active on DM8147

    Viet Dinh
    Victor, I have a suggestion but don't know if it work for you. Let say you use the PLL_L3 at 132MHz then the GPMC_FCLK is at 66 MHz, if you run the sync GPMC mode, you will have GPMC_CLK output at 66 MHz when you set the GPMCFCLKDIVIDER to 0. This way you will have the 66 MHz and GPMC is running...
    on Feb 29, 2012

  • Forum Post: Phy interrupt active high/low matters in uboot?

    Jun_Zhang
    Greetings, Our custon dm8148 board can load the uboot and when I stop loading the linux kernel (we have issues during loading linux kernel). Then i run DHCP and get this messages: TI8148#: DHCP failed to read bmcr BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 ====== The...
    on Mar 23, 2012

  • Forum Post: Re: AM387x GPMC_CLK(FCLK?)

    Viet Dinh
    Michi, Yes, you are corrected. BR, Viet
    on Apr 19, 2012

  • Forum Post: RE: AM387x GPMC_CLK(FCLK?)

    Viet Dinh
    Jean-Michel, I got from GPMC designer as the gpmc_fclk is synthesize at 100 MHz and guarantee up to 100MHz. BR, Viet
    on May 21, 2012

  • Forum Post: RE: AM387x GPMC_CLK(FCLK?)

    Viet Dinh
    Jean-Michel, You are corrected. It is directly derived from L3 clock so the GPMC_FCLK can be as high as 120MHz in this case. But, as I said earlier, gpmc_fclk is synthesized in design at 100 MHz and guarantee up to 100MHz. BR, Viet
    on May 22, 2012

  • Forum Post: DM8148 GPMC Series Resistors

    Michael Hallak-Stamler
    The Mistral EVM has series resistors on all GPMC lines including address and data. Is this really necessary?? Isn't it enough to for clock only?
    on Nov 25, 2011

  • Forum Post: RE: DM814x EVM (Mistral baseboard PG2.1) GPMC

    Viet Dinh
    Hi GINNI, Do you get your GEL file from here? http://processors.wiki.ti.com/index.php/DM814x_Overview BR, Viet
    on Jun 13, 2012

  • Forum Post: DM814x EVM (Mistral baseboard PG2.1) GPMC

    GINNI
    Hi, I would like to test the GPMC interface of the DM814x. 1. Step: Try out the GPMC configuration of the included GEL file (DM814X_PG2.1_DDR2_DDR3_V3_EVM_) I run the 'Centaurus_System_Initialisation_GP_Device', 'DDR3_EMIF0_EMIF1_Config' scripts --> no problem When I run the...
    on Jun 13, 2012

  • Forum Post: RE: DM814x: C674x access to peripherals (GPMC)

    Jonathan Journo
    Hello, I am trying to configure the System MMU to access the DSP non-mapped memory (GPMC memory) from the DSP core. But when accessing the RAM from the DSP apps, the core hangs. (beacaus of a mmu exception) My DSP system memory setup is : MEMORY CONFIGURATION name origin length used unused...
    on Aug 30, 2012

  • Forum Post: DM814x: C674x access to peripherals (GPMC)

    Jonathan Journo
    Hello, I am working on a DM814x chip and I have encounter a problem. Hopping anyone have found solutions....:-) We need to access the GPMC bus from the C674x directly but unfortunately the GPMC memory is not mapped to the C674x core. We could not read the data through the ARM and pass it to the DSP...
    on Oct 27, 2011

  • Forum Post: RE: issues in GPMC interfacing of FPGA DDR3

    Viet Dinh
    Hi, Could you give us your config infor from prink? printk(KERN_DEBUG "Config1: 0x%x\n", gpmc_cs_read_reg(GPMC_CHIP_SEL_NUM, GPMC_CS_CONFIG1)); printk(KERN_DEBUG "Config2: 0x%x\n", gpmc_cs_read_reg(GPMC_CHIP_SEL_NUM, GPMC_CS_CONFIG2)); printk(KERN_DEBUG "Config3: 0x%x\n"...
    on Dec 26, 2012

  • Forum Post: RE: AM387x GPMC_CLK(FCLK?)

    Viet Dinh
    Hi Jean-Michel, The TRM is corrected. Please see this post for more detail on GPMC clk discussion: http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/p/183641/662574.aspx#662574. BR, Viet
    on Jan 9, 2013

  • Forum Post: RE: Booting over UART

    John Lin57981
    Thanks for you reply. Bugged u-boot images the u-boot image is ok. because i flash it to the appro dm8127, and it works. Problem in the CCS flashing procedure when i flash the nand in ccs, the gpmc clock frequency is almost 40Mhz. And the data signal is ok. However, when the board boots...
    on Jan 31, 2013

  • Forum Post: Support for raw SLC NAND device in DM8148

    Anuj Aggarwal
    Hi, One of my customers wants to use the following SLC NAND part in their design with DM8148: Sno Parameter MT29F16G08ABABA (Micron) Unit 1 Total Size 2G Bytes 2 Data Bus Width ...
    on Nov 5, 2012

  • Forum Post: RE: DMA to a GPMC attached FPGA on a 8148 processor

    Bernard Seller
    Surely someone has DMA'd to or from the GPMC bus of an 8148 before ? Is there sample code out there for the 8148 & its GPMC bus? thanks Bernard
    on Apr 24, 2013

  • Forum Post: DMA to a GPMC attached FPGA on a 8148 processor

    Bernard Seller
    Could someone point me to working sample code to DMA from memory to an GPMC attached FPGA (NOR - like) on an 8148 processor ? (Angstrom distribution) I tried to modify the edma_test that comes with the EZSDK with no success I can successfully use ioremap_nocache to then read / write to the...
    on Mar 22, 2013

All content and materials on this site are provided "as is". TI and its respective suppliers and providers of content make no representations about the suitability of these materials for any purpose and disclaim all warranties and conditions with regard to these materials, including but not limited to all implied warranties and conditions of merchantability, fitness for a particular purpose, title and non-infringement of any third party intellectual property right. TI and its respective suppliers and providers of content make no representations about the suitability of these materials for any purpose and disclaim all warranties and conditions with respect to these materials. No license, either express or implied, by estoppel or otherwise, is granted by TI. Use of the information on this site may require a license from a third party, or a license from TI.

Content on this site may contain or be subject to specific guidelines or limitations on use. All postings and use of the content on this site are subject to the Terms of Use of the site; third parties using this content agree to abide by any limitations or guidelines and to comply with the Terms of Use of this site. TI, its suppliers and providers of content reserve the right to make corrections, deletions, modifications, enhancements, improvements and other changes to the content and materials, its products, programs and services at any time or to move or discontinue any content, products, programs, or services without notice.

TI Worldwide | Contact Us | my.TI Login | Site Map | Corporate Citizenship | mobile m.ti.com (Mobile Version)

TI is a global semiconductor design and manufacturing company. Innovate with 100,000+ analog ICs and
embedded processors, along with software, tools and the industry’s largest sales/support staff.

© Copyright 1995-2013 Texas Instruments Incorporated. All rights reserved.
Trademarks | Privacy Policy | Terms of Use