Hello,
I have a question on AM3894 boot from NAND/SD. Which one is faster ? From my research it looks like SD has slightly higher throughput. Can you please confirm.
AM3894 mentions that the GPMC can address 256Mbytes of NAND flash per address pin and there are 6 address pins. But the tech reference manual mentions that upto 64Gb NAND flash is supported by AM3894. How is that possible ? What point am I missing ?
Thanks,
Lakshmi
Hi Lakshmi,
We currently have boot-time measurements for the AM3894 using a SD card which includes the test setup and boot configuration in the following wiki:
http://processors.wiki.ti.com/index.php/DM816x_C6A816x_AM389x_PSP_04.00.00.10_Feature_Performance_Guide#Boot-time_measurement
In the same wiki you can find NAND and SD card driver performance benchmarks. I need to verify if this driver performance benchmarks can be used to determine which boot mode is faster. I will get back to you on this one.
http://processors.wiki.ti.com/index.php/DM816x_C6A816x_AM389x_PSP_04.00.00.10_Feature_Performance_Guide#Performance_Benchmarks
http://processors.wiki.ti.com/index.php/DM816x_C6A816x_AM389x_PSP_04.00.00.10_Feature_Performance_Guide#Performance_and_Benchmarks_5
Lakshmi Santosh AM3894 mentions that the GPMC can address 256Mbytes of NAND flash per address pin and there are 6 address pins. But the tech reference manual mentions that upto 64Gb NAND flash is supported by AM3894. How is that possible ? What point am I missing ?
Would you mind pointing me to the page on the TRM that gives this specification?
Thanks for your feedback.
Please see on page 2241 - Table 25-13. Supported NAND Devices
Lakshmi,
The AM3894 ROM code supports all the NAND devices with the IDs in the table, including the 64 GB memory given the fact that it supports large page size and very large page size. Also as stated in section 25.7.3, ROM code also supports NAND devices which are ONFI compliant.
If you decide you wnat to boot from NAND, section 25.7.3.2 shows pins required for such boot option.
Hope this helps.
Thanks. The datasheet is misleading. You can close this thread.
One more question. Can AM3894 connect up to 6, 64Gb devices ? Can it boot from multiple NAND IC's or only using NAND connected to CS0 ?
When booting from NAND you can only have one 64 GB device connected to CS0. Please refer to the following E2E post which also applies to the AM3894.
http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/t/163641.aspx
Hope this helps
Yes this helps. Can you please get these info added to the datasheet.
Also, I would like to confirm if AM3894 can support max 2GBytes of DDR3 memory using the two DDR3 controllers (1GB per DDR3 controller).
Thanks,Lakshmi
Yes, you are right.
Please refer to the following forum which also applies to the AM3894 on how to support the 2 GB of DDR3.
http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/t/170304.aspx
Regards
Ivan is correct. 512MB is the total addressable memory of the GPMC (i.e. for all chip selects combined). NAND does not use address lines from the GPMC so you will only need to use a tiny address space from the GPMC perspective to write to a huge NAND space since all the addressing is done through the NAND protocol. So to be clear, you are NOT limited to only 512 MB in terms of the NAND size. See: http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/t/179173.aspx
Regards,Marc
Please mark this Forum post as answered via the Verify Answer button below if it helps answer your question. Thanks!
Ivan,
Thanks for the EVM manual. I could not find it on AM3894 EVM page or spectrum website. Also, the schematics (Rev E) shows 8, 1Gb DDR3 which is only 1GB. That is where I got confused.
Marc,
Thanks for that note. I can tell this person got the same confusion reading the spec. I did find in AM3894 datasheet under "Boot Sequence" more relevant info. But the summary page and the GPMC sections are quite confusing. If we don't dig enough, its hard to understand it. Also, similar to what this post mentioned, the NAND memory has 4096 + 224 bytes page size while TI mentions 4096 + 128/218 bytes. I had the same question but guessed this can be modified during programming.
In summary, this is what I understand. I can connect max 64 Gb (8GB) NAND flash for booting. Only CS0 can be used.
Hello Ivan & Marc,
We are not able to boot directly from a NAND flash with a page size of 4096 + 224 bytes. I checked other similar postings and its not clear whether this can be made to work. Please comment.