DM816x, C6A816x and AM389x Processors Forum - Recent Threads

how many cycles to read one register in L4 level ---dm8168

Lusheng zhang — Tue, 18 Jun 2013 15:46:24 GMT

At dm8168, arm clock 987M, sysclock8 is about 400M, ddr3 is about 796M.

When I want to count the cycles of reading TIMER_COUNTER ,I find that it cost so much time.

For example, read TIMER_COUNTER for 1000 times, it need 3500 timer ticks(timer clock is 27M, about 130 us)

reading write DMA controller register for 1000 times, it need 2400 timer ticks(timer clock is 27M, about 89us) .

I donot know the actual cycles.

OMX.TI.VPSSM3.VFPC.NF issue with EZSDK decode_display example

Pierre-Louis Cabelguen — Mon, 10 Jun 2013 15:41:06 GMT

HI !

I am using a noise filter to perform YUY2->NV12 conversion with EZSDK 5_05_02.

When using this component, I always get a few jerky frames (2 or 3) on the output of the noise filter. I noticed that this issue also appears with the decode_display example found in component-sources/omx_05_02_00_48/examples/ti/omx/demos/decode_display/ (I get a frame full of grey pixels)

Is this a known bug in your driver or an issue in the configuration? This is rather a blocking issue to me since the output of my application always has those two dirty frames...

Regards.

How to configure DM8168 DSP to run at 1.0GHz or 1.125GHz?

Zhao Li — Fri, 07 Jun 2013 20:12:57 GMT

This is a repost from BIOS forum. In essence, I want to know how to configure DSP clock speed from the DSP side or from the ARM side if DSP side is not an option.

Thanks.

Hi,

I am using components from ti-ezsdk_dm816x-evm_5_03_01_15 to build message passing communication path between ARM and DSP cores. The problem I am having is that I configured the DSP to run at 1000MHz in the platform file (where the DSP CPU clock, memory and cache are configured), but when I use CLK_gethtime() to measure clock speed, it shows that the CPU is actually running at about 813MHz!!

The interesting thing is that CLK_getltime() and Task_sleep() works fine no matter what CPU clock speed i configure in the platform configuration file. It is because of this that I figured out that my DSP CPU is actually running at around 813MHz by looking at the CLK_gethtime() results.

Please see my code section and measurement results below. The LogTime(t1), LogLowTime(t1_low) just calls either CLK_gethtime() or CLK_getltime() and CLK_countspms() to figure out the time elapsed and to display it to the console ( as you see in the Measurement Results section below ).

Can some experts please help tell me how to configure the DSP clock to a specified value? This is a repost from BIOS forum, some one there suggested that the U-Boot/Linux configures DSP frequency as well. Is this true? Is there any correlation between ARM and DSP clock frequencies?

Thank you!

Zhao

*******Begin Code Section********

void SendStatus(DspMsg_s* rxMsg, short msgId)

{

unsigned int t1, t1_low;

System_sprintf( rxMsg->d.status.status.versStr, "%s.%02d", "V_00", msgId );

// Test code to find out the CPU clock speed

t1 = CLK_gethtime();

Task_sleep(100);// 100 ms

LogTime(t1);

　 t1_low = CLK_getltime();

Task_sleep(10000);// 10 s

LogLowTime(t1_low);

}

*******End Code Section********

*********Begin Measurement Results***********

[C674X_0] Sending a message #1 to 3

[C674X_0] elapsed time: ms[81] us[715]

[C674X_0] elapsed time: ms[10000] us[0]

[C674X_0] Sending a message #2 to 3

[C674X_0] elapsed time: ms[81] us[340]

[C674X_0] elapsed time: ms[10000] us[0]

[C674X_0] Sending a message #3 to 3

[C674X_0] elapsed time: ms[81] us[315]

[C674X_0] elapsed time: ms[10000] us[0]

*********End Measurement Results***********

*********Begin ARM Side Debug TimeStamps**********

Jun 26 23:48:18 WCS MeasRcv: Sending message #1 to DSP

Jun 26 23:48:28 WCS MeasRcv: Received DSP msg #1, response #1, Version is V_00.01

Jun 26 23:48:28 WCS MeasRcv: Sending message #2 to DSP

Jun 26 23:48:38 WCS MeasRcv: Received DSP msg #2, response #2, Version is V_00.02

Jun 26 23:48:38 WCS MeasRcv: Sending message #3 to DSP

Jun 26 23:48:49 WCS MeasRcv: Received DSP msg #3, response #3, Version is V_00.03

Jun 26 23:48:49 WCS MeasRcv: Successfully completed DSP message test, 3 loops

*********End ARM Side Debug TimeStamps**********

incorporating nsf link (for format conversion) causes video flow to halt

Stephen Munnings — Fri, 14 Jun 2013 19:04:15 GMT

I am doing some prototyping and experimenting with a use case that will take mosaic output and feed it back through the encoder, and eventually back to an RTSP stream (or external file)

I have a working partial prototype that has this functionality:

SWMS-->Dup-->DVO2 (And HDCOMP)

|---->NULL Sink

This part works fine. :)

Now I am changing it (one step at a time) and now the flow is:

SWMS-->Dup-->DVO2 (And HDCOMP)

|--->NSF-->Null Sink.

When I do that, the display freezes (on what appears to be the first frame).

Statistics indicate that DVO2 saw 15 frames and nsf says that it saw 0 frames.

This is consistent with nsf not being correctly "hooked up", etc., and therefore not allowing additional frames to flow to the display.

I am using DVR RDK 3.0, and have been getting much good information from this thread:

http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/t/245100.aspx?pi239031349=6

I have been looking over my code and the supposedly good code from the thread, and I cannot see why this might happen.

(I have been checking obvious candidates, but of course, may have missed something)

Does anybody know of a reason for this configuration to freeze (quick response), before I have to go to the more drastic measure of uploading code, logs, etc.,

(for example: "nsf output cannot be sent to a null sink, the format of the buffers is incompatible", or something like that)

Thanks.

(If I get no answers by Monday, I will upload the usecase code and the output from the logging for detailed analysis)

question about DM8168 DVR4.0 Cap encode link

he yingjie — Wed, 19 Jun 2013 02:30:47 GMT

hi,

i want to do a test about capture 4 ch D1 video(1 pecs TVP5158) then encode them,now i use link like this:

SYSTEM_LINK_ID_CAPTURE -> SYSTEM_LINK_ID_DEI_HQ_0 -> SYSTEM_LINK_ID_IPC_FRAMES_OUT_0 ->

SYSTEM_VPSS_LINK_ID_IPC_OUT_M3_0 -> SYSTEM_VIDEO_LINK_ID_IPC_IN_M3_0 -> SYSTEM_LINK_ID_VENC_0 ->

SYSTEM_VIDEO_LINK_ID_IPC_BITS_OUT_0 -> SYSTEM_HOST_LINK_ID_IPC_BITS_IN_0

but run this app,it seems not work right, is there any mistake?

hw:DM8168 EVM + VS_DC sw: DVR RDK 4.0

log is shown in below:

U-Boot 2010.06 (Jun 16 2013 - 23:06:43)

TI8168-GP rev 2.0

HDVICP clk     : 600MHz
L3 Fast clk    : 549MHz
HDVPSS clk     : 274MHz
Ducati M3 clk : 274MHz
DSP clk        : 1000MHz
ARM clk        : 1200MHz
DDR clk        : 531MHz

------------ PLL Settings --------------
MAIN_N : 56, MAIN_P: 1, OSC_FREQ: 27, FAPLL_K: 8

MAIN_INTFREQ1 : 0xC, MAIN_FRACFREQ1: 0x189374, MAIN_MDIV1: 0x1
MAIN_INTFREQ2 : 0xA, MAIN_FRACFREQ2: 0x147AE1, MAIN_MDIV2: 0x1
MAIN_INTFREQ3 : 0xA, MAIN_FRACFREQ3: 0x147AE1, MAIN_MDIV3: 0x2
MAIN_INTFREQ4 : 0xB, MAIN_FRACFREQ4: 0x0, MAIN_MDIV4: 0x2
MAIN_INTFREQ5 : 0xC, MAIN_FRACFREQ5: 0x189374, MAIN_MDIV5: 0x8

MAIN_MDIV6 : 0x3F
MAIN_MDIV7 : 0x4

--------- DDR PLL ----------
DDR_N                  : 0x3B
DDR_P                  : 0x1
DDR_MDIV1              : 0x3
DDR_INTFREQ2           : 0x8
DDDDR_FRACFREQ2R_N     : 0xD99999
DDR_MDIV2              : 0x1E
DDR_INTFREQ3           : 0x8
DDR_FRACFREQ3          : 0x0
DDR_MDIV3              : 0x4
DDR_INTFREQ4           : 0xE
DDR_FRACFREQ4          : 0x0
DDR_MDIV4              : 0x4
DDR_INTFREQ5           : 0xE
DDR_FRACFREQ5          : 0x0
DDR_MDIV5              : 0x4

----------EMIF Timings (identical for 0 & 1)-------
EMIF_TIM1   : 0x0CCCE524
EMIF_TIM2   : 0x30308023
EMIF_TIM3   : 0x009F82CF
EMIF_SDREF : 0x10000C30
EMIF_SDCFG : 0x62A41032
EMIF_PHYCFG : 0x0000010B

----------SW LEVEL Info (EMIF 0) -------
RD_DQS_GATE_BYTE_LANE0: 0x0000012A
RD_DQS_GATE_BYTE_LANE1: 0x0000012A
RD_DQS_GATE_BYTE_LANE2: 0x0000012A
RD_DQS_GATE_BYTE_LANE3: 0x0000012A

WR_DQS_RATIO_BYTE_LANE0: 0x000000A6
WR_DQS_RATIO_BYTE_LANE1: 0x000000A6
WR_DQS_RATIO_BYTE_LANE2: 0x000000A6
WR_DQS_RATIO_BYTE_LANE3: 0x000000A6

RD_DQS_RATIO_BYTE_LANE0: 0x0000003B
RD_DQS_RATIO_BYTE_LANE1: 0x0000003B
RD_DQS_RATIO_BYTE_LANE2: 0x0000003B
RD_DQS_RATIO_BYTE_LANE3: 0x0000003B

WR_DATA_RATIO_BYTE_LANE0: 0x000000E6
WR_DATA_RATIO_BYTE_LANE1: 0x000000E6
WR_DATA_RATIO_BYTE_LANE2: 0x000000E6
WR_DATA_RATIO_BYTE_LANE3: 0x000000E6

----------SW LEVEL Info (EMIF 1) -------
RD_DQS_GATE_BYTE_LANE0: 0x0000012A
RD_DQS_GATE_BYTE_LANE1: 0x0000012A
RD_DQS_GATE_BYTE_LANE2: 0x0000012A
RD_DQS_GATE_BYTE_LANE3: 0x0000012A

WR_DQS_RATIO_BYTE_LANE0: 0x000000A6
WR_DQS_RATIO_BYTE_LANE1: 0x000000A6
WR_DQS_RATIO_BYTE_LANE2: 0x000000A6
WR_DQS_RATIO_BYTE_LANE3: 0x000000A6

RD_DQS_RATIO_BYTE_LANE0: 0x0000003B
RD_DQS_RATIO_BYTE_LANE1: 0x0000003B
RD_DQS_RATIO_BYTE_LANE2: 0x0000003B
RD_DQS_RATIO_BYTE_LANE3: 0x0000003B

WR_DATA_RATIO_BYTE_LANE0: 0x000000E6
WR_DATA_RATIO_BYTE_LANE1: 0x000000E6
WR_DATA_RATIO_BYTE_LANE2: 0x000000E6
WR_DATA_RATIO_BYTE_LANE3: 0x000000E6

I2C:   ready
DRAM: 1 GiB
NAND: HW ECC BCH8 Selected
256 MiB
MMC:   OMAP SD/MMC: 0
:,;;:;:;;;;;;;;r;;:,;;:;:;;;;;;;;:,;;:;:;;;;;;;;:,;;:;:;;;;;;;;:;;;;;;;;:,;;:;:
;,;:::;;;;r;;;rssiSiS552X5252525259GX2X9hX9X9XX2325S55252i5:,;;:;:;;;;;;;;:,;;:
;:;;;;;;;rrssSsS52S22h52299GGAAMHMM#BBH#B#HMM#HMBA&&XX2255S2S5Si:,;;:;:;;;;;;;;
;:;;r;;rsrrriiXS5S329&A&MH#BMB#A&9XXA252GXiSXX39AAMMMBB&G22S5i2SSiiiisi:,;;:;:;
;;;;;r;rr2iisiih393HB#B#AA99i22irrrX3X52AGsisss2Xii2299HBMA&X2S5S5iSiisSsi:,;;:
r:r;rrsrsihXSi2&##MHB&Ahh3AGHGA9G9h&#H##@@@##MAMMXXX9SSS29&&HGGX2i5iisiiisisi:,
;;rrrrsSiiiA&ABH&A9GAGhAhBAMHA9HM@@@@@@@@@@@@@@@@@@@HHhAh2S2SX9&Gh22SSiisiiisii
r:rrssisiS2XM##&h3AGAX&3GG3Ssr5H@M#HM2; ;2X&&&MHMB###GBB#B&XXSSs529XX55iSsisisi
r;rsrisSi2XHAhX99A3XXG&&XS;:,rH#HGhAS   @@@@3rs2XBM@@A552&&AHA2XiisSS252SSsisSs
r;issi5S22&&3iSSX292&hXsr;;:;h@&G339&S9@@@@2@MA&9&HB##Xris29ABMAAX2ir;rsSi5iss5
rrsSi2XhG&9GXh399&X99i;;;;;;r#H&293H9X#@@@@@@@B&9GhAH@XrrsrsiXABHB&HG2rr;rrSiSi
;:rsisS599&AA9XG&3A35r;:::;,;BMh&&2iX5A@@@@@@@&392X5GB2;;;r;iSX393A##A&Xi:::rsi
;:rss552222X553&XHMhir;;::,:,h#HhGSXhG3#@@@@#AXXS2XAHA;::;;;;ss55XShBA3239r:,;;
r;ii2S5SSi2i53hirsh2srr::,,,,;MMXX359&Ah3h&Si59SX99A#i:,::::;;sri2,.2r;:SGAr;,:
;:;rrrrssiriXGSi::shs;;;,,,:,,rBBA9h5s5h5iS5isi2SAHB5:,,,:::;rrs5&SrisSX5Srrr:,
;,r;;;;rsriSSrrrr;;5Xrr;;,:,,.,;9AA2SsisS5323XXXG9&i:.,,::;;r;;;srrrrrr;;:;::::
:,;r;r;rrissrrr;:;::;s;;;;,:,,..,r293h222hXXAAGGGX;:,,,:,:,::;:;::,:,,,,...,,,,
;,;;;;rrrrrrrrirr;,.,,:::::::,,,,.,;SX&ABAB2hhXir:,,.,,.,,:,,,,..,,,..,..,,,..:
:.:;:;;;:;;;;r;rrs;:.. ,,:::::,:,:,,.::rrsrr;;,,.......,..,....,,,,,,,...,.,,:,
:.:::,::::::;;r;rrr;:.......,.,.,,:::,,...............,,::.,,,,:,::,,:,:,,,:,;:
,.::,:,,,,,;;;;;;;;r;;::,..............................;;;:;::::,:::::::,:,:,,,
: ,,:,,,,,,,,,,,,,:;rrr;;:;,,,,,,,::,.,.:.,.,;s,:;;;;:;:;;;;;::::,:::,:::,:,:,:
,.,,,,,,,...,,.,,....................................:,............:,,,:,:,,,,,

Net: Detected MACID:aa:bb:cc:dd:ee:ff
Ethernet PHY: GENERIC @ 0x01
DaVinci EMAC
Hit any key to stop autoboot: 0

NAND read: device 0 offset 0x580000, size 0x300000
3145728 bytes read: OK
## Booting kernel from Legacy Image at 81000000 ...
   Image Name:   Linux-2.6.37
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:    2569084 Bytes = 2.5 MiB
   Load Address: 80008000
   Entry Point: 80008000
   Verifying Checksum ... OK
   Loading Kernel Image ... OK
OK

Starting kernel ...

Uncompressing Linux... done, booting the kernel.
Linux version 2.6.37 (x0161644@bangvideoapps01) (gcc version 4.5.3 20110311 (prerelease) (GCC) ) #1 Fri May 3 18:24:18 IST 2013
CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c53c7f
CPU: VIPT nonaliasing data cache, VIPT aliasing instruction cache
Machine: ti8168evm
vram size = 41943040 at 0x0
ti81xx_reserve: ### Reserved DDR region @8ff00000
reserved size = 41943040 at 0x0
FB: Reserving 41943040 bytes SDRAM for VRAM
Memory policy: ECC disabled, Data cache writeback
OMAP chip is TI8168 2.0
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 54528
Kernel command line: mem=256M console=ttyO2,115200n8 root=/dev/nfs rw nfsroot=192.168.0.104:/usr/local/DM8168/dvr/DVRRDK_04.00.00.03/target/rfs_816x ip=192.168.0.243:192.168.0.104:192.168.0.1:255.255.255.0::eth0:off vram=40M notifyk.vpssm3_sva=0xBEE00000 ddr_mem=1024M
PID hash table entries: 1024 (order: 0, 4096 bytes)
Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
Memory: 214MB 1MB = 215MB total
Memory: 212344k/212344k available, 49800k reserved, 0K highmem
Virtual kernel memory layout:
    vector : 0xffff0000 - 0xffff1000   (   4 kB)
    fixmap : 0xfff00000 - 0xfffe0000   ( 896 kB)
    DMA     : 0xffc00000 - 0xffe00000   (   2 MB)
    vmalloc : 0xd0800000 - 0xf8000000   ( 632 MB)
    lowmem : 0xc0000000 - 0xd0000000   ( 256 MB)
    pkmap   : 0xbfe00000 - 0xc0000000   (   2 MB)
    modules : 0xbf000000 - 0xbfe00000   ( 14 MB)
      .init : 0xc0008000 - 0xc0041000   ( 228 kB)
      .text : 0xc0041000 - 0xc04e2000   (4740 kB)
      .data : 0xc04e2000 - 0xc052c280   ( 297 kB)
SLUB: Genslabs=11, HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
NR_IRQS:407
IRQ: Found an INTC at 0xfa200000 (revision 5.0) with 128 interrupts
Total of 128 interrupts on 1 active controller
GPMC revision 6.0
Trying to install interrupt handler for IRQ400
Trying to install interrupt handler for IRQ401
Trying to install interrupt handler for IRQ402
Trying to install interrupt handler for IRQ403
Trying to install interrupt handler for IRQ404
Trying to install interrupt handler for IRQ405
Trying to install interrupt handler for IRQ406
Trying to install type control for IRQ407
Trying to set irq flags for IRQ407
OMAP clockevent source: GPTIMER1 at 27000000 Hz
Console: colour dummy device 80x30
Calibrating delay loop... 1199.30 BogoMIPS (lpj=5996544)
pid_max: default: 32768 minimum: 301
Security Framework initialized
Mount-cache hash table entries: 512
CPU: Testing write buffer coherency: ok
devtmpfs: initialized
TI81XX: Map 0x8ff00000 to 0xfe500000 for dram barrier
TI81XX: Map 0x40300000 to 0xfe600000 for sram barrier
omap_voltage_early_init: voltage driver support not added
regulator: core version 0.5
regulator: dummy:
NET: Registered protocol family 16
omap_voltage_domain_lookup: Voltage driver init not yet happened.Faulting!
omap_voltage_add_dev: VDD specified does not exist!
OMAP GPIO hardware version 0.1
OMAP GPIO hardware version 0.1
omap_mux_init: Add partition: #1: core, flags: 0
_omap_mux_get_by_name: Could not find signal i2c2_scl.i2c2_scl
_omap_mux_get_by_name: Could not find signal i2c2_sda.i2c2_sda
NOR: Can't request GPMC CS
registered ti816x_gpio_vr device
registered ti816x_sr device
Cannot clk_get ck_32
pm_dbg_init: only OMAP3 supported
registered ti81xx_vpss device
registered ti81xx_vidout device
registered ti81xx on-chip HDMI device
registered ti81xx_fb device
registered ti81xx_vin device
ti81xx_pcie: Invoking PCI BIOS...
ti81xx_pcie: Setting up Host Controller...
ti81xx_pcie: Register base mapped @0xd0820000
ti81xx_pcie: Starting PCI scan...
PCI: bus0: Fast back to back transfers enabled
ti81xx_pcie: PCI scan done.
bio: create slab <bio-0> at 0
regulator: VFB: 800 <--> 1025 mV at 1010 mV
vgaarb: loaded
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
USBSS revision 4ea20809
registerd cppi-dma Intr @ IRQ 17
Cppi41 Init Done
omap_i2c omap_i2c.1: bus 1 rev4.0 at 100 kHz
I2C: Read failed at pcf8575_cir_enable 670 with error code: -121
I2C: Transfer failed at pcf8575_cir_enable 676 with error code: -121
omap_i2c omap_i2c.2: bus 2 rev4.0 at 100 kHz
Advanced Linux Sound Architecture Driver Version 1.0.23.
Switching to clocksource gp timer
musb-hdrc: version 6.0, host, debug=0
musb-hdrc musb-hdrc.0: dma type: dma-cppi41
MUSB controller-0 revision 4ea20800
musb-hdrc musb-hdrc.0: MUSB HDRC host driver
musb-hdrc musb-hdrc.0: new USB bus registered, assigned bus number 1
usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb1: Product: MUSB HDRC host driver
usb usb1: Manufacturer: Linux 2.6.37 musb-hcd
usb usb1: SerialNumber: musb-hdrc.0
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 1 port detected
musb-hdrc musb-hdrc.0: USB Host mode controller at d081e000 using DMA, IRQ 18
musb-hdrc musb-hdrc.1: dma type: dma-cppi41
MUSB controller-1 revision 4ea20800
musb-hdrc musb-hdrc.1: MUSB HDRC host driver
musb-hdrc musb-hdrc.1: new USB bus registered, assigned bus number 2
usb usb2: New USB device found, idVendor=1d6b, idProduct=0002
usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb2: Product: MUSB HDRC host driver
usb usb2: Manufacturer: Linux 2.6.37 musb-hcd
usb usb2: SerialNumber: musb-hdrc.1
hub 2-0:1.0: USB hub found
hub 2-0:1.0: 1 port detected
musb-hdrc musb-hdrc.1: USB Host mode controller at d0826800 using DMA, IRQ 19
NET: Registered protocol family 2
IP route cache hash table entries: 2048 (order: 1, 8192 bytes)
TCP established hash table entries: 8192 (order: 4, 65536 bytes)
TCP bind hash table entries: 8192 (order: 3, 32768 bytes)
TCP: Hash tables configured (established 8192 bind 8192)
TCP reno registered
UDP hash table entries: 256 (order: 0, 4096 bytes)
UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
NET: Registered protocol family 1
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
NetWinder Floating Point Emulator V0.97 (double precision)
PMU: registered new PMU device of type 0
omap-iommu omap-iommu.0: ducati registered
omap-iommu omap-iommu.1: sys registered
JFFS2 version 2.2. (NAND) 漏 2001-2006 Red Hat, Inc.
msgmni has been set to 414
io scheduler noop registered
io scheduler deadline registered
io scheduler cfq registered (default)
Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
omap_uart.0: ttyO0 at MMIO 0x48020000 (irq = 72) is a OMAP UART0
omap_uart.1: ttyO1 at MMIO 0x48022000 (irq = 73) is a OMAP UART1
omap_uart.2: ttyO2 at MMIO 0x48024000 (irq = 74) is a OMAP UART2
console [ttyO2] enabled
brd: module loaded
loop: module loaded
ahci probe: devid name is ahci
ahci CAP register dump =0x6726ff81
Modified ahci CAP register dump =0x6f26ff81
ahci ahci.0: forcing PORTS_IMPL to 0x3
ahci: SSS flag set, parallel bus scan disabled
ahci ahci.0: AHCI 0001.0100 32 slots 2 ports 3 Gbps 0x3 impl platform mode
ahci ahci.0: flags: ncq sntf stag pm led clo only pmp pio slum part ccc
scsi0 : ahci_platform
scsi1 : ahci_platform
ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a150fff] port 0x100 irq 16
ata2: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a150fff] port 0x180 irq 16
m25p80 spi1.0: found m25p05-nonjedec, expected m25p80
m25p80 spi1.0: m25p05-nonjedec (64 Kbytes)
Creating 4 MTD partitions on "spi_flash":
0x000000000000-0x000000040000 : "U-Boot"
mtd: partition "U-Boot" extends beyond the end of device "spi_flash" -- size truncated to 0x10000
0x000000010000-0x000000012000 : "U-Boot Env"
mtd: partition "U-Boot Env" is out of reach -- disabled
0x000000000000-0x000000280000 : "Kernel"
mtd: partition "Kernel" extends beyond the end of device "spi_flash" -- size truncated to 0x10000
0x000000010000-0x000000010000 : "File System"
mtd: partition "File System" is out of reach -- disabled
omap2-nand driver initializing
davinci_mdio davinci_mdio.0: davinci mdio revision 1.6
davinci_mdio davinci_mdio.0: detected phy mask fffffffd
davinci_mdio.0: probed
davinci_mdio davinci_mdio.0: phy[1]: device 0:01, driver unknown
usbcore: registered new interface driver cdc_ether
usbcore: registered new interface driver dm9601
Initializing USB Mass Storage driver...
usbcore: registered new interface driver usb-storage
USB Mass Storage support registered.
mice: PS/2 mouse device common for all mice
omap_rtc omap_rtc: rtc core: registered omap_rtc as rtc0
i2c /dev entries driver
Linux video capture interface: v2.00
usbcore: registered new interface driver uvcvideo
USB Video Class driver (v1.0.0)
OMAP Watchdog Timer Rev 0x00: initial timeout 60 sec
usbcore: registered new interface driver usbhid
usbhid: USB HID core driver
notify_init : notify drivercreated for remote proc id 2 at physical Address 0xbee00000
usbcore: registered new interface driver snd-usb-audio
Registered tvp5158 audio codec
asoc: tvp5158-hifi <-> davinci-mcasp.0 mapping ok
asoc: tlv320aic3x-hifi <-> davinci-mcasp.2 mapping ok
asoc: HDMI-DAI-CODEC <-> hdmi-dai mapping ok
ALSA device list:
#0: TI81XX SOUND0
#1: TI81XX SOUND1
TCP cubic registered
NET: Registered protocol family 17
VFP support v0.3: implementor 41 architecture 3 part 30 variant c rev 3
omap_voltage_late_init: Voltage driver support not added
Power Management for TI81XX.
smartreflex smartreflex: Driver initialized
omap_rtc omap_rtc: setting system clock to 2000-01-01 00:00:00 UTC (946684800)
davinci_mdio davinci_mdio.0: resetting idled controller
net eth0: attached PHY driver [Generic PHY] (mii_bus:phy_addr=0:01, id=282f014)
IP-Config: Complete:
     device=eth0, addr=192.168.0.243, mask=255.255.255.0, gw=192.168.0.1,
     host=192.168.0.243, domain=, nis-domain=(none),
     bootserver=192.168.0.104, rootserver=192.168.0.104, rootpath=
PHY: 0:01 - Link is Up - 100/Full
ata1: COMRESET failed (errno=-32)
ata1: limiting SATA link speed to 1.5 Gbps
ata1: SATA link down (SStatus 0 SControl 310)
ata2: SATA link down (SStatus 0 SControl 300)
VFS: Mounted root (nfs filesystem) on device 0:15.
devtmpfs: mounted
Freeing init memory: 228K
INIT: version 2.88 booting
Mounting /dev/shm              : Mounting /dev/pts          : Mounting other filesystems : Mounting /dev/sda1              : mount: mounting /dev/sda1 on /media/sda1 failed: No such file or directory
Mounting /dev/sda2              : mkdir: can't create directory '/media': File exists
mkdir: can't create directory '/media/sda2': File exists
mount: mounting /dev/sda2 on /media/sda2 failed: No such file or directory
Sync command ...Error opening /dev/fb0: No such file or directory
Starting udev
udev[71]: starting version 164
Starting Bootlog daemon: bootlogd.
Applying sync command

_____                    _____           _         _
| _ |___ ___ ___ ___   | _ |___ ___ |_|___ ___| |_
|     | _| .'| . | . | |   __| _| . | | | -_| _| _|
|__|__|_| |__,|_ |___| |__| |_| |___|_| |___|___|_|
              |___|                    |___|

Arago Project http://arago-project.org dm816x ttyO2

Arago 2012.10 dm816x ttyO2

dm816x login: root
root@dm816x:~# cd /opt/dvr_rdk/ti816x/
root@dm816x:/opt/dvr_rdk/ti816x# ./init.sh
*** Bootargs Validated for mem param ***
*** Bootargs Validated for notifyk.vpssm3 params ***
*** Kernel Base address validated ***
Kernel bootargs validated
numid=101,iface=MIXER,name='Left DAC Mux'
; type=ENUMERATED,access=rw------,values=1,items=3
; Item #0 'DAC_L1'
; Item #1 'DAC_L3'
; Item #2 'DAC_L2'
: values=2
numid=99,iface=MIXER,name='Right DAC Mux'
; type=ENUMERATED,access=rw------,values=1,items=3
; Item #0 'DAC_R1'
; Item #1 'DAC_R3'
; Item #2 'DAC_R2'
: values=2
[c6xdsp ] Remote Debug Shared Memory @ 0xbf000000
[m3video] Remote Debug Shared Memory @ 0xbf010820
[m3vpss ] Remote Debug Shared Memory @ 0xbf021040
SysLink version : 2.20.02.20
SysLink module created on Date:Jun 16 2013 Time:19:16:18
Trace enabled
Trace SetFailureReason enabled
Setting DMM priority for [DUCATI ] to [0] ( 0x4e000624 = 0x08000000 )
Setting DMM priority for [HDVICP0 ] to [2] ( 0x4e000634 = 0x0000000a )
Setting DMM priority for [HDVICP1 ] to [2] ( 0x4e000634 = 0x000a0000 )
Setting DMM priority for [HDVICP2 ] to [2] ( 0x4e000634 = 0x00a00000 )

*** TVP5158 probe : START ***

TI VS EVM : TVP5158 device address : 0x58, 0x5a, 0x5c, 0x5e
TI DVR    : TVP5158 device address : 0x5c, 0x5d, 0x5e, 0x5f

Device found     : I2C (0xXX): 0x08 = 0x51
                    I2C (0xXX): 0x09 = 0x58

Device NOT found : I2C (0xXX): Read ERROR !!! (reg[0x08], count = 2)

I2C (0x58): 0x08 = 0x51
I2C (0x58): 0x09 = 0x58
I2C (0x5a): 0x08 = 0x51
I2C (0x5a): 0x09 = 0x58
I2C (0x5c): Read ERROR !!! (reg[0x08], count = 2)
I2C (0x5d): Read ERROR !!! (reg[0x08], count = 2)
I2C (0x5e): 0x08 = 0x51
I2C (0x5e): 0x09 = 0x58
I2C (0x5f): Read ERROR !!! (reg[0x08], count = 2)

*** TVP5158 probe : END ***

/opt/dvr_rdk/ti816x
root@dm816x:/opt/dvr_rdk/ti816x# ./load.sh
Attached to slave procId 2.
Loaded file ../firmware/dvr_rdk_fw_m3vpss_1024M_256M.xem3 on slave procId 2.
Started slave procId 2.
After Ipc_loadcallback status [0x00000000]
[m3vpss ] ***** VPSS Firmware build time 19:30:04 Jun 16 2013 EDG gcc 3.0 mode
[m3vpss ] ***** SYSTEM : Frequency <ORG> - 250000000, <NEW> - 274909088
[m3vpss ] Seth Custom
[m3vpss ] notify_attach rtnVal 0
[m3vpss ] initProxyServer rtnVal 0
[m3vpss ]
[m3vpss ] *** UTILS: CPU KHz = 549818 Khz ***
[m3vpss ]
[m3vpss ] 36: SYSTEM : System Common Init in progress !!!
[m3vpss ] 36: SYSTEM: IPC init in progress !!!
[m3vpss ] 36: SYSTEM: Attaching to [HOST] ...
[m3vpss ] 38: SYSTEM: Attaching to [HOST] ... SUCCESS !!!
After Ipc_startcallback status [0x00000000]
Attached to slave procId 1.
Loaded file ../firmware/dvr_rdk_fw_m3video_1024M_256M.xem3 on slave procId 1.
Started slave procId 1.
After Ipc_loadcallback status [0x00000000]
[m3video] ***** VIDEO Firmware build time 19:31:15 Jun 16 2013 EDG gcc 3.0 mode
[m3video] ***** SYSTEM : Frequency <ORG> - 250000000, <NEW> - 274909088
[m3video]
[m3video] *** UTILS: CPU KHz = 549818 Khz ***
[m3video]
[m3video] 432: SYSTEM : System Common Init in progress !!!
[m3video] 432: SYSTEM: IPC init in progress !!!
[m3video] 432: SYSTEM: Attaching to [HOST] ...
[m3video] 434: SYSTEM: Attaching to [HOST] ... SUCCESS !!!
After Ipc_startcallback status [0x00000000]
Attached to slave procId 0.
Loaded file ../firmware/dvr_rdk_fw_c6xdsp_1024M_256M.xe674 on slave procId 0.
Started slave procId 0.
After Ipc_loadcallback status [0x00000000]
[c6xdsp ] ***** VIDEO Firmware build time 19:28:07 Jun 16 2013 EDG gcc 3.0 mode
[c6xdsp ] ***** SYSTEM : Frequency <ORG> - 800000000, <NEW> - 1000000000
[c6xdsp ]
[c6xdsp ] *** UTILS: CPU KHz = 1000000 Khz ***
[c6xdsp ]
[c6xdsp ] 5: SYSTEM : System Common Init in progress !!!
[c6xdsp ] 5: SYSTEM: IPC init in progress !!!
[c6xdsp ] 5: SYSTEM: Attaching to [HOST] ...
[c6xdsp ] 8: SYSTEM: Attaching to [HOST] ... SUCCESS !!!
After Ipc_startcallback status [0x00000000]
[c6xdsp ] 11: SYSTEM: Attaching to [VIDEO-M3] ... SUCCESS !!!
[m3video] 617: SYSTEM: Attaching to [DSP] ... SUCCESS !!!
[m3vpss ] 619: SYSTEM: Attaching to [DSP] ... SUCCESS !!!
[c6xdsp ] 13: SYSTEM: Attaching to [VPSS-M3] .DMA: Module install successful, device major num = 251
.. SUCCESS !!!
DRV: Module install successful
[m3video] 621:DRV: Module built on Jun 16 2013 19:16:44
SYSTEM: Attaching to [VPSS-M3] ... SUCCESS !!!
[m3vpss ] 621: SYSTEM: Attaching to [VIDEO-M3] ... SUCCESS !!!
[c6xdsp ] 13: SYSTEM: Creating MsgQ Heap [IPC_MSGQ_MSG_HEAP_0] ...
[m3video] 621: SYSTEM: Creating MsgQ Heap [IPC_MSGQ_MSG_HEAP_1] ...
[m3vpss ] 621: SYSTEM: Creating MsgQ Heap [IPC_MSGQ_MSG_HEAP_2] ...
[c6xdsp ] 13: SYSTEM: Creating MsgQ [DSP_MSGQ] ...
[m3video] 622: SYSTEM: Creating MsgQ [VIDEO-M3_MSGQ] ...
[m3vpss ] 622: SYSTEM: Creating MsgQ [VPSS-M3_MSGQ] ...
[c6xdsp ] 13: SYSTEM: Creating MsgQ [DSP_ACK_MSGQ] ...
[m3video] 622: SYSTEM: Creating MsgQ [VIDEO-M3_ACK_MSGQ] ...
[m3vpss ] 622: SYSTEM: Creating MsgQ [VPSS-M3_ACK_MSGQ] ...
[c6xdsp ] 14: SYSTEM: Notify register to [HOST] line 0, event 15 ...
[m3video] 623: SYSTEM: Notify register to [HOST] line 0, event 15 ...
[m3vpss ] 623: SYSTEM: Notify register to [HOST] line 0, event 15 ...
[c6xdsp ] 14: SYSTEM: Notify register to [VIDEO-M3] line 0, event 15 ...
[m3video] 624: SYSTEM: Notify register to [DSP] line 0, event 15 ...
[m3vpss ] 624: SYSTEM: Notify register to [DSP] line 0, event 15 ...
[c6xdsp ] 14: SYSTEM: Notify register to [VPSS-M3] line 0, event 15 ...
[m3video] 624: SYSTEM: Notify register to [VPSS-M3] line 0, event 15 ...
[m3vpss ] 624: SYSTEM: Notify register to [VIDEO-M3] line 0, event 15 ...
[c6xdsp ] 14: SYSTEM: IPC init DONE !!!
[m3video] 624: SYSTEM: IPC init DONE !!!
[m3vpss ] 624: SYSTEM: IPC init DONE !!!
[c6xdsp ] 15: MEM: Shared Region 2: Base = 0xae000000, Length = 0x109c0000 (265 MB)
[c6xdsp ] 16: MEM: DEBUG: SharedRegion_setEntry (2, 0x9ffa7b9c) OK !!! (status=0)
[c6xdsp ] 16: MEM: Shared Region 1: Base = 0x90000000, Length = 0x0c900000 (201 MB)
[c6xdsp ] 16: SYSTEM : System Common Init Done !!!
[c6xdsp ] 10: SYSTEM : System DSP Init in progress !!!
[c6xdsp ] 10: SYSTEM : RpeServer_init() done... Ret Val 0!!!
[c6xdsp ] 18: SYSTEM: Creating ListMP [DSP_IPC_OUT_19] in region 0 ...
[c6xdsp ] 18: SYSTEM: Creating ListMP [DSP_IPC_IN_19] in region 0 ...
[c6xdsp ] 19: SYSTEM: ListElem Shared Addr = 0xbf273e00
[c6xdsp ] 19: SYSTEM: Creating ListMP [DSP_IPC_OUT_20] in region 0 ...
[c6xdsp ] 19: SYSTEM: Creating ListMP [DSP_IPC_IN_20] in region 0 ...
[m3video] 630: MEM: Shared Region 2: Base = 0xae000000, Length = 0x109c0000 (265 MB)
[m3vpss ] 630: MEM: Shared Region 2: Base = 0xae000000, Length = 0x109c0000 (265 MB)
[c6xdsp ] 19: SYSTEM: ListElem Shared Addr = 0xbf299600
[m3video] 630: MEM: DEBUG: SharedRegion_setEntry (2, 0x3d881f80) OK !!! (status=0)
[m3vpss ] 630: MEM: DEBUG: SharedRegion_setEntry (2, 0x3ed6ae00) OK !!! (status=0)
[c6xdsp ] 20: SYSTEM: Creating ListMP [DSP_IPC_OUT_21] in region 0 ...
[m3video] 630: MEM: Shared Region 1: Base = 0x90000000, Length = 0x0c900000 (201 MB)
[m3vpss ] 630: MEM: Shared Region 1: Base = 0x90000000, Length = 0x0c900000 (201 MB)
[c6xdsp ] 20: SYSTEM: Creating ListMP [DSP_IPC_IN_21] in region 0 ...
[m3video] 632: SYSTEM : System Common Init Done !!!
[m3vpss ] 632: SYSTEM : System Common Init Done !!!
[c6xdsp ] 20: SYSTEM: ListElem Shared Addr = 0xbf2bee00
[m3video] 632: SYSTEM : System Video Init in progress !!!
[m3vpss ] 632: SYSTEM : System VPSS Init in progress !!!
[c6xdsp ] 20: SYSTEM: Creating ListMP [DSP_IPC_OUT_24] in region 0 ...
[m3video] 632: SYSTEM : System Video Init Done !!!
[c6xdsp ] 21: SYSTEM: Creating ListMP [DSP_IPC_IN_24] in region 0 ...
[m3video] 633: SYSTEM: Creating ListMP [VIDEO-M3_IPC_OUT_0] in region 0 ...
[m3vpss ] === HDVPSS Clocks are enabled ===
[c6xdsp ] 21: SYSTEM: ListElem Shared Addr = 0xbf2e4600
[m3video] 633: SYSTEM: Creating ListMP [VIDEO-M3_IPC_IN_0] in region 0 ...
[m3vpss ] === HDVPSS is fully functional ===
[c6xdsp ] 21: SYSTEM: Creating ListMP [DSP_IPC_OUT_25] in region 0 ...
[m3video] 633: SYSTEM: ListElem Shared Addr = 0xbf31fc00
[m3vpss ] === HDVPSS module is not in standby ===
[c6xdsp ] 21: SYSTEM: Creating ListMP [DSP_IPC_IN_25] in region 0 ...
[m3video] 635: SYSTEM: Creating ListMP [VIDEO-M3_IPC_OUT_1] in region 0 ...
[m3vpss ] === I2C1 Clk is active ===
[c6xdsp ] 21: SYSTEM: ListElem Shared Addr = 0xbf302100
[m3video] 635: SYSTEM: Creating ListMP [VIDEO-M3_IPC_IN_1] in region 0 ...
[m3vpss ] 641: SYSTEM: Creating ListMP [VPSS-M3_IPC_OUT_0] in region 0 ...
[c6xdsp ] !!WARNING.Resource already registered:2
[c6xdsp ] 16: SYSTEM : Initializing Links !!!
[m3video] 635: SYSTEM: ListElem Shared Addr = 0xbf323100
[m3vpss ] 641: SYSTEM: Creating ListMP [VPSS-M3_IPC_IN_0] in region 0 ...
[m3video] 641: SYSTEM: Creating ListMP [VIDEO-M3_IPC_OUT_19] in region 0 ...
[m3vpss ] 641: SYSTEM: ListElem Shared Addr = 0xbf326600
[c6xdsp ] 22: SYSTEM : FREE SPACE : System Heap      = 10391168 B, Mbx = 10240 msgs)
[m3video] 642: SYSTEM: Creating ListMP [VIDEO-M3_IPC_IN_19] in region 0 ...
[m3vpss ] 643: SYSTEM: Creating ListMP [VPSS-M3_IPC_OUT_1] in region 0 ...
[m3video] 642: SYSTEM: ListElem Shared Addr = 0xbf329b00
[m3vpss ] 643: SYSTEM: Creating ListMP [VPSS-M3_IPC_IN_1] in region 0 ...
[c6xdsp ] 25: SYSTEM : Initializing Links ... DONE !!!
[m3video] 644: SYSTEM: Creating ListMP [VIDEO-M3_IPC_OUT_20] in region 0 ...
[m3vpss ] 644: SYSTEM: ListElem Shared Addr = 0xbf34f300
[m3video] 644: SYSTEM: Creating ListMP [VIDEO-M3_IPC_IN_20] in region 0 ...
[m3vpss ] 658: SYSTEM: Creating ListMP [VPSS-M3_IPC_OUT_19] in region 0 ...
[c6xdsp ] ETH_OFFLOAD: Init !!!
[m3video] 645: SYSTEM: ListElem Shared Addr = 0xbf352800
[m3vpss ] 658: SYSTEM: Creating ListMP [VPSS-M3_IPC_IN_19] in region 0 ...
[c6xdsp ] 26: SYSTEM : System DSP Init Done !!!
[m3video] 647: SYSTEM: Creating ListMP [VIDEO-M3_IPC_OUT_21] in region 0 ...
[m3vpss ] 658: SYSTEM: ListElem Shared Addr = 0xbf39d800
[m3video] 647: SYSTEM: Creating ListMP [VIDEO-M3_IPC_IN_21] in region 0 ...
[m3vpss ] 661: SYSTEM: Creating ListMP [VPSS-M3_IPC_OUT_20] in region 0 ...
[m3video] 647: SYSTEM: ListElem Shared Addr = 0xbf378000
[m3vpss ] 661: SYSTEM: Creating ListMP [VPSS-M3_IPC_IN_20] in region 0 ...
[m3video] 661: SYSTEM: Creating ListMP [VIDEO-M3_IPC_OUT_24] in region 0 ...
[m3vpss ] 661: SYSTEM: ListElem Shared Addr = 0xbf3c3280
[m3video] 661: SYSTEM: Creating ListMP [VIDEO-M3_IPC_IN_24] in region 0 ...
[m3vpss ] 664: SYSTEM: Creating ListMP [VPSS-M3_IPC_OUT_21] in region 0 ...
[m3video] 662: SYSTEM: ListElem Shared Addr = 0xbf3e8800
[m3vpss ] 664: SYSTEM: Creating ListMP [VPSS-M3_IPC_IN_21] in region 0 ...
[m3video] 664: SYSTEM: Creating ListMP [VIDEO-M3_IPC_OUT_25] in region 0 ...
[m3vpss ] 664: SYSTEM: ListElem Shared Addr = 0xbf423e00
[m3video] 664: SYSTEM: Creating ListMP [VIDEO-M3_IPC_IN_25] in region 0 ...
[m3vpss ] 666: SYSTEM : HDVPSS Drivers Version: HDVPSS_01_00_01_37
[m3video] 664: SYSTEM: ListElem Shared Addr = 0xbf406900
[m3vpss ] 666: SYSTEM : FVID2 Init in progress !!!
[m3video] 666: HDVICP: Doing PRCM for IVAHD[0] ...
[m3video] 666: HDVICP: PRCM for IVAHD[0] ... DONE.
[m3video] 666: HDVICP: Doing PRCM for IVAHD[1] ...
[m3video] 666: HDVICP: PRCM for IVAHD[1] ... DONE.
[m3video] 666: HDVICP: Doing PRCM for IVAHD[2] ...
[m3vpss ] TILER_STATS: CNT :8BIT
[m3video] 666: HDVICP: PRCM for IVAHD[2] ... DONE.
[m3video] 667: SYSTEM : Initializing Links !!!
[m3vpss ] TILER_STATS: CNT RESOLUTION:    16384 x 8192
[c6xdsp ] Remote Debug Shared Memory @ 0xbf000000
[m3video] Remote Debug Shared Memory @ 0xbf010820
[m3vpss ] Remote Debug Shared Memory @ 0xbf021040
[m3vpss ] Received character 's'
[m3video] 667: SYSTEM : FREE SPACE : System Heap      = 6279304 B, Mbx = 10240 msgs)
[m3vpss ] TILER_STATS: BUCKET RESOLUTION: 16384 x 8188
[c6xdsp ] Remote Debug Shared Memory @ 0xbf000000
[m3video] Remote Debug Shared Memory @ 0xbf010820
[m3vpss ] Remote Debug Shared Memory @ 0xb[module] vpss probe done.
f021040
[m3video] Received character 's'
[m3video] 667: SYSTEM : FREE SPACE : SR0 Heap         = 12283904 B (11 MB)
[m3vpss ] TILER_STATS: NUM FREE BUCKETS: 1
[c6xdsp ] Remote Debug Shared Memory @ 0xbf000000
[m3video] Remote Debug Shared Memory @ 0xbf010820
[m3vpss ] Remote Debug Shared Memory @ 0xbf021040
[c6xdsp ] Received character 's'
/opt/dvr_rdk/ti816x
[[module] ti81xxfb probe done.
m3video] 667: SYSTEM : FREE SPACE : Frame Buffer     = 278658944 B (265 MB)
[m3vpss ] TILER_STATS: NUM USED BUCKETS: 0
[m3video] 667: SYSTEM : FREE SPACE : Bitstream Buffer = 210763648 B (200 MB)
[m3vpss ] TILER_STATS: TOTAL FREE AREA:   134152192 (99 %)
[m3video] 667: SYHDMI W1 rev 2.0
STEM: Opening MsHDMI CEC Spec version 1.2
gQ [VPSS-M3_MSGQ] ...
[m3vpss ] TILER_STATS: TOTAL USED AREA:   0 (0 %)
[m3video] 669: SYSTEM : FREE SPACE : Tiler 8-bit      = 134152192 B (127 MB) - TILER ON
[m3video] 669: SYSTEM : FREE SPACE : Tiler 16-bit     = 100663296 B (96 MB) - TILER ON
[m3video] 705: SYSTEM : Initializing Links ... DONE !!!
[m3vpss ] TILER_STATS: CNT :16BIT
[m3vpss ] TILER_STATS: CNT RESOLUTION:    32768 x 3072
[m3vpss ] TILER_STATS: BUCKET RESOLUTION: 32768 x 3072
[m3vpss ] TILER_STATS: NUM FREE BUCKETS: 1
[m3vpss ] TILER_STATS: NUM USED BUCKETS: 0
[m3vpss ] TILER_STATS: TOTAL FREE AREA:   100663296 (100 %)
[m3vpss ] TILER_STATS: TOTAL USED AREA:   0 (0 %)
[m3vpss ] 739: SYSTEM : FVID2 Init in progress DONE !!!
[m3vpss ] 739: SYSTEM : Device Init in progress !!!
[m3vpss ] 742: SYSTEM : Device Init in progress DONE !!!
[m3vpss ] 782: SYSTEM : System VPSS Init Done !!!
[m3vpss ] 783: UTILS: DMA: HWI Create for INT63 !!!
[m3vpss ] 783: SYSTEM : Initializing Links !!!
[m3vpss ] 783: SYSTEM : FREE SPACE : System Heap      = 74056 B, Mbx = 10240 msgs)
[m3vpss ] 783: SYSTEM : FREE SPACE : SR0 Heap         = 12283904 B (11 MB)
[m3vpss ] 784: SYSTEM : FREE SPACE : Frame Buffer     = 274348928 B (261 MB)
[m3vpss ] 784: SYSTEM : FREE SPACE : Bitstream Buffer = 210763648 B (200 MB)
[m3vpss ] TILER_STATS: CNT :8BIT
[m3vpss ] TILER_STATS: CNT RESOLUTION:    16384 x 8192
[m3vpss ] TILER_STATS: BUCKET RESOLUTION: 16384 x 8188
[m3vpss ] TILER_STATS: NUM FREE BUCKETS: 1
[m3vpss ] TILER_STATS: NUM USED BUCKETS: 0
[m3vpss ] TILER_STATS: TOTAL FREE AREA:   134152192 (99 %)
[m3vpss ] TILER_STATS: TOTAL USED AREA:   0 (0 %)
[m3vpss ] TILER_STATS: CNT :16BIT
[m3vpss ] TILER_STATS: CNT RESOLUTION:    32768 x 3072
[m3vpss ] TILER_STATS: BUCKET RESOLUTION: 32768 x 3072
[m3vpss ] TILER_STATS: NUM FREE BUCKETS: 1
[m3vpss ] TILER_STATS: NUM USED BUCKETS: 0
[m3vpss ] TILER_STATS: TOTAL FREE AREA:   100663296 (100 %)
[m3vpss ] TILER_STATS: TOTAL USED AREA:   0 (0 %)
[m3vpss ] 785: SYSTEM : FREE SPACE : Tiler 8-bit      = 134152192 B (127 MB) - TILER ON
[m3vpss ] 785: SYSTEM : FREE SPACE : Tiler 16-bit     = 100663296 B (96 MB) - TILER ON
[m3vpss ] 904: SYSTEM : Initializing Links ... DONE !!!
[m3vpss ] 904: SYSTEM : Set Static L3 pressure for HDVPSS as High

ORG 0x46c00524: 0
NEW 0x46c00524: 2

root@dm816x:/opt/dvr_rdk/ti816x# ./run.sh

=========
Main Menu
=========

1: VCAP + VENC + VDEC + VDIS - Progressive SD Encode + Decode
2: VCAP + VENC + VDIS - SD Encode ONLY
3: VCAP + VENC + VDEC + VDIS - Progressive HD Encode + Decode
4: VDEC + VDIS - SD/HD Decode ONLY
a: 960H DVR usecase

e: Exit

Enter Choice: 2
--------------- CHANNEL DETAILS-------------
Capture Channels => 4
Enc Channels => Primary 4, Secondary 0
Disp Channels => 0
-------------------------------------------
0: SYSTEM: System Common Init in progress !!!
0: SYSTEM: IPC init in progress !!!
13: SYSTEM: CPU [DSP] syslink proc ID is [0] !!!
13: SYSTEM: CPU [VIDEO-M3] syslink proc ID is [1] !!!
13: SYSTEM: CPU [VPSS-M3] syslink proc ID is [2] !!!
13: SYSTEM: CPU [HOST] syslink proc ID is [3] !!!
13: SYSTEM: Creating MsgQ Heap [IPC_MSGQ_MSG_HEAP_3] ...
15: SYSTEM: Creating MsgQ [HOST_MSGQ] ...
17: SYSTEM: Creating MsgQ [HOST_ACK_MSGQ] ...
19: SYSTEM: Opening MsgQ [DSP_MSGQ] ...
19: SYSTEM: Opening MsgQ [VIDEO-M3_MSGQ] ...
20: SYSTEM: Opening MsgQ [VPSS-M3_MSGQ] ...
21: SYSTEM: Notify register to [DSP] line 0, event 15 ...
21: SYSTEM: Notify register to [VIDEO-M3] line 0, event 15 ...
22: SYSTEM: Notify register to [VPSS-M3] line 0, event 15 ...
23: SYSTEM: IPC init DONE !!!
24: SYSTEM: Creating ListMP [HOST_IPC_OUT_24] in region 0 ...
26: SYSTEM: Creating ListMP [HOST_IPC_IN_24] in region 0 ...
27: SYSTEM: ListElem Shared Addr = 0x406e3880
28: SYSTEM: Creating ListMP [HOST_IPC_OUT_25] in region 0 ...
30: SYSTEM: Creating ListMP [HOST_IPC_IN_25] in region 0 ...
32: SYSTEM: ListElem Shared Addr = 0x40718a80
33: SYSTEM: Creating ListMP [HOST_IPC_OUT_19] in region 0 ...
35: SYSTEM: Creating ListMP [HOST_IPC_IN_19] in region 0 ...
37: SYSTEM: ListElem Shared Addr = 0x4074dc80
38: SYSTEM: Creating ListMP [HOST_IPC_OUT_20] in region 0 ...
40: SYSTEM: Creating ListMP [HOST_IPC_IN_20] in region 0 ...
41: SYSTEM: ListElem Shared Addr = 0x40790f80
42: SYSTEM: Creating ListMP [HOST_IPC_OUT_21] in region 0 ...
45: SYSTEM: Creating ListMP [HOST_IPC_IN_21] in region 0 ...
46: SYSTEM: ListElem Shared Addr = 0x407d4280
63: SYSTEM: System Common Init Done !!!
[host] HDMI Ctrl :Initializing
[host] HDMI Ctrl :Initialized
[host] HDMI Ctrl :Sink Connected

Enable file write (YES - y / NO - n) : n

File write DISABLED !!!

[host] MCFW_IPCFRAMES:VcapVenc_ipcFramesSendRecvFxn:Entered... 1951: MCFW : CPU Revision [ES2.0] !!!

TVP_CHIP_ID_READ:0x5158
VCAP: DEVICE-0 (0x58): Chip ID 0x5158, Rev 0x0002, Firmware 0x0000 !!!
VCAP: DEVICE-0 (0x58): Detected video (720x288@50Hz, 1) !!!
VCAP: DEVICE-1 (0x5c): Device not found !!!
VCAP: DEVICE-2 (0x5a): Chip ID 0x5158, Rev 0x0002, Firmware 0x0000 !!!
VCAP: DEVICE-2 (0x5a): NO Video Detected !!!
VCAP: DEVICE-3 (0x5e): Chip ID 0x5158, Rev 0x0002, Firmware 0x0000 !!!
VCAP: DEVICE-3 (0x5e): NO Video Detected !!!
TVP5158: 0x58: Downloading patch ...
TVP5158: 0x58: Downloading patch ... DONE !!!
TVP5158: 0x58: 5158:0002:0302
TVP5158: 0x5a: Downloading patch ...
TVP5158: 0x5a: Downloading patch ... DONE !!!
TVP5158: 0x5a: 5158:0002:0302
TVP5158: 0x5e: Downloading patch ...
TVP5158: 0x5e: Downloading patch ... DONE !!!
TVP5158: 0x5e: 5158:0002:0302
gVencModuleContext.vencConfig.numPrimaryChn = 4

[m3vpss ] 150962: CAPTURE: Create in progress !!!
[m3vpss ] 150992: CAPTURE: VIP0 PortA capture mode is [ 8-bit, Pixel-mux Embedded Sync] !!!
[m3vpss ] UTILS: DMA: Allocated CH (TCC) = 58 (58)
[m3vpss ] UTILS: DMA: 0 of 4: Allocated PaRAM = 58 (0x49004740)
[m3vpss ] UTILS: DMA: 1 of 4: Allocated PaRAM = 64 (0x49004800)
[m3vpss ] UTILS: DMA: 2 of 4: Allocated PaRAM = 65 (0x49004820)
[m3vpss ] UTILS: DMA: 3 of 4: Allocated PaRAM = 66 (0x49004840)
[m3vpss ] CAPTURE::HEAPID:0    USED:328
[m3vpss ] CAPTURE::HEAPID:4    USED:22800384
[m3vpss ] 151081: CAPTURE: Create Done !!!
[m3vpss ] 151081: DEI    : Create in progress !!!
[c6xdsp ] 150585: IPC_FRAMES_OUT   : Create in progress !!!
[m3video] 151195: IPC_IN_M3   : Create in progress !!!
[m3vpss ] 151190: DEI     : Loading Up-scaling Co-effs
[c6xdsp ] 150586: SYSTEM: Opening MsgQ [VPSS-M3_MSGQ] ...
[m3video] 151195: SYSTEM: Opening ListMP [VPSS-M3_IPC_OUT_0] ...
[m3vpss ] 151190: DEI     : Co-effs Loading ... DONE !!!
[m3video] 151196: SYSTEM: Opening ListMP [VPSS-M3_IPC_IN_0] ...
[c6xdsp ] 150587: IPC_FRAMES_OUT   : Create Done !!!
[m3video] 151198: IPC_IN_M3   : Create Done !!!
[m3vpss ] DEI:HEAPID:0 USED:64
[m3video] 151198: ENCODE: Create in progress ... !!!
[m3vpss ] DEI:HEAPID:1 USED:10304
[m3video] 4: ENCODE:pObj->inQueInfo.numCh= 0
[m3vpss ] DEI:HEAPID:4 USED:22708224
[m3vpss ] 151190: DEI    : Create Done !!!
[m3vpss ] 151193: IPC_OUT_M3   : Create in progress !!!
[m3vpss ] 151193: SYSTEM: Opening MsgQ [DSP_MSGQ] ...
[m3vpss ] 151195: IPC_OUT_M3   : Create Done !!!
[m3video] 151224: ENCODE: Creating CH0 of 704 x 576, pitch = (704, 704) [PROGRESSIVE] [NON-TILED ], bitrate = 2000 Kbps ...
[m3video] ENCLINK_H264:HEAPID:0        USED:13808
[m3video] ENCLINK_H264:HEAPID:3        USED:1769472
[m3video] 151234: ENCODE: Creating CH1 of 704 x 576, pitch = (704, 704) [PROGRESSIVE] [NON-TILED ], bitrate = 2000 Kbps ...

[host] IpcBitsInLink_tskMain:Entered
[host] 13615: IPC_BITS_IN : Create in progress !!!

[host] 13615: IPC_BITS_IN : ListMPOpen start !!!

[host] 13615: SYSTEM: Opening ListMP [VIDEO-M3_IPC_OUT_24] ...
13617: SYSTEM: Opening ListMP [VIDEO-M3_IPC_IN_24] ...

[host] 13619: IPC_BITS_IN : ListMPOpen done !!!

[host] 13620: IPC_BITS_IN : System_linkGetInfo done !!!

[host] 13620: IPC_BITS_IN : Create Done !!!

Vsys_create()out;

Venc_start()in;

Venc_start()out;

Vcap_start()in;
[m3video] ENCLINK_H264:HEAPID:0        USED:11912
[m3video] ENCLINK_H264:HEAPID:3        USED:1769472
[m3video] 151243: ENCODE: Creating CH2 of 704 x 576, pitch = (704, 704) [PROGRESSIVE] [NON-TILED ], bitrate = 2000 Kbps ...
[m3video] ENCLINK_H264:HEAPID:0        USED:11912
[m3vpss ] 151292: CAPTURE: Start in progress !!!
[m3video] ENCLINK_H264:HEAPID:3        USED:1769472
[m3video] 151253: ENCODE: Creating CH3 of 704 x 576, pitch = (704, 704) [PROGRESSIVE] [NON-TILED ], bitrate = 2000 Kbps ...
[m3video] ENCLINK_H264:HEAPID:0        USED:11912
[m3video] ENCLINK_H264:HEAPID:3        USED:1769472
[m3video] 151262: ENCODE: All CH Create ... DONE !!!
[m3video] ENCLINK:HEAPID:0     USED:49664
[m3video] ENCLINK:HEAPID:2     USED:4976640
[m3video] ENCLINK:HEAPID:3     USED:7077888
[m3video] 151264: ENCODE: Create ... DONE !!!
[m3video] 151264: IPC_BITS_OUT   : Create in progress !!!
[m3video] 151266: IPC_BITS_OUT   : Create Done !!!
[m3vpss ] 151392: CAPTURE: Enabled Time Stamping !!!

Vcap_start()out;
[m3vpss ] 151400: CAPTURE: Start Done !!!
[m3vpss ] MSGQ:Warning!! Forcing waitAck = TRUE as waitAck = FALSE is not supported.
[m3vpss ] Fix send cmd [0x4] to linkId [0x13]
[m3vpss ] MSGQ:Warning!! Forcing waitAck = TRUE as waitAck = FALSE is not supported.
[m3vpss ] Fix send cmd [0x4] to linkId [0x13]
[m3vpss ] MSGQ:Warning!! Forcing waitAck = TRUE as waitAck = FALSE is not supported.
[m3vpss ] Fix send cmd [0x4] to linkId [0x13]
DEMO: 0: video detected at CH [0,0] width:720 height:288 !!!
DEMO: 1: No video detected at CH [0,1] !!!
DEMO: 2: No video detected at CH [0,2] !!!
DEMO: 3: No video detected at CH [0,3] !!!
DEMO: 4: No video detected at CH [1,0] !!!
DEMO: 5: No video detected at CH [1,1] !!!
DEMO: 6: No video detected at CH [1,2] !!!
DEMO: 7: No video detected at CH [1,3] !!!
DEMO: 8: No video detected at CH [2,0] !!!
DEMO: 9: No video detected at CH [2,1] !!!
DEMO: 10: No video detected at CH [2,2] !!!
DEMO: 11: No video detected at CH [2,3] !!!
DEMO: 12: No video detected at CH [3,0] !!!
DEMO: 13: No video detected at CH [3,1] !!!
DEMO: 14: No video detected at CH [3,2] !!!
DEMO: 15: No video detected at CH [3,3] !!!

=============
Run-Time Menu
=============

1: Capture Settings
2: Encode Settings
3: Decode Settings
4: Display Settings
5: Audio Capture <TVP5158> & Encode <AAC-LC, G711> demo
6: Change Playback Channel <valid only if capture/playback is active>
7: Audio encode demo <File In/Out>
8: Audio decode demo <File In/Out>

i: Print detailed system information
s: Core Status: Active/In-active
f: Switch IVA Channel Map

e: Stop Demo

Enter Choice: [m3vpss ] MSGQ:Warning!! Forcing waitAck = TRUE as waitAck = FALSE is not supported.
[m3vpss ] Fix send cmd [0x4] to linkId [0x13]
[m3vpss ] MSGQ:Warning!! Forcing waitAck = TRUE as waitAck = FALSE is not supported.
[m3vpss ] Fix send cmd [0x4] to linkId [0x13]
[m3vpss ] MSGQ:Warning!! Forcing waitAck = TRUE as waitAck = FALSE is not supported.
[m3vpss ] Fix send cmd [0x4] to linkId [0x13]
[m3vpss ] MSGQ:Warning!! Forcing waitAck = TRUE as waitAck = FALSE is not supported.
[m3vpss ] Fix send cmd [0x4] to linkId [0x13]
[m3vpss ] MSGQ:Warning!! Forcing waitAck = TRUE as waitAck = FALSE is not supported.
[m3vpss ] Fix send cmd [0x4] to linkId [0x13]
[m3vpss ] MSGQ:Warning!! Forcing waitAck = TRUE as waitAck = FALSE is not supported.
[m3vpss ] Fix send cmd [0x4] to linkId [0x13]
[m3vpss ] MSGQ:Warning!! Forcing waitAck = TRUE as waitAck = FALSE is not supported.
[m3vpss ] Fix send cmd [0x4] to linkId [0x13]
DEMO: HDMI TV/Monitor connected !!!

=============
Run-Time Menu
=============

i: Print detailed system information
s: Core Status: Active/In-active
f: Switch IVA Channel Map

e: Stop Demo

Enter Choice: i

DEMO: 0: Detected video at CH [0,0] (720x288@50Hz, 1)!!!
DEMO: 1: No video detected at CH [0,1] !!!
DEMO: 2: No video detected at CH [0,2] !!!
DEMO: 3: No video detected at CH [0,3] !!!
DEMO: 4: No video detected at CH [1,0] !!!
DEMO: 5: No video detected at CH [1,1] !!!
DEMO: 6: No video detected at CH [1,2] !!!
DEMO: 7: No video detected at CH [1,3] !!!
DEMO: 8: No video detected at CH [2,0] !!!
DEMO: 9: No video detected at CH [2,1] !!!
DEMO: 10: No video detected at CH [2,2] !!!
DEMO: 11: No video detected at CH [2,3] !!!
DEMO: 12: No video detected at CH [3,0] !!!
DEMO: 13: No video detected at CH [3,1] !!!
DEMO: 14: No video detected at CH [3,2] !!!
DEMO: 15: No video detected at CH [3,3] !!!

[c6xdsp ]
[c6xdsp ] *** IpcFramesOutRTOS Statistics ***
[c6xdsp ]
[c6xdsp ] Elasped Time           : 89 secs
[c6xdsp ] Total Fields Processed : 0
[c6xdsp ] Total Fields FPS       : 0 FPS
[c6xdsp ]
[c6xdsp ]
[c6xdsp ] CH | In Recv In Process In Skip
[c6xdsp ] Num | FPS     FPS        FPS
[c6xdsp ] --------------------------------
[m3vpss ]
[c6xdsp ]    0 |       0          0       0
[c6xdsp ]    1 |       0          0       0
[m3vpss ] *** Capture Driver Advanced Statistics ***
[c6xdsp ]    2 |       0          0       0
[c6xdsp ]    3 |       0          0       0
[m3vpss ]
[c6xdsp ]
[m3vpss ] VIP Parser Reset Count : 0
[m3vpss ]
[m3vpss ]      |   Total    Even     Odd Total Even   Odd Min / Max Min / Max Dropped Fid Repeat Frame Error Y/C
[m3vpss ] CH | Fields Fields Fields    FPS   FPS   FPS       Width      Height Fields      Count (Desc Error Y/C)
[m3vpss ] ------------------------------------------------------------------------------------------------------------
[m3vpss ] 000 |    4479    2240    2239     50    25    25 720 / 720 288 / 288       1          0 0/0 (0/0)
[m3vpss ] 001 |    5348    2674    2674     60    30    30 720 / 720 243 / 244       1          0 0/0 (0/0)
[m3vpss ] 002 |    5348    2674    2674     60    30    30 720 / 720 243 / 244       1          0 0/0 (0/0)
[m3vpss ] 003 |    5348    2674    2674     60    30    30 720 / 720 243 / 244       1          0 0/0 (0/0)
[m3vpss ]
[m3vpss ] VIP Capture Port 0 | DescMissMatch1 = 0, DescMissMatch2 = 0 , DescMissMatch3 = 0
[m3vpss ]
[m3vpss ] *** Capture List Manager Advanced Statistics ***
[m3vpss ]
[m3vpss ] List Post Count        : 11200
[m3vpss ] List Stall Count       : 0
[m3vpss ] List Post Time (ms)    : Max = 0, Min = 0, Avg = 0, Total = 0
[m3vpss ] INTC Timeout Count     : (0, 0) (Min timeout value = 985, 1000)
[m3vpss ] Descriptor miss found count : 0
[m3vpss ]
[m3vpss ]
[m3vpss ] VIP and VPDMA registers,
[m3vpss ] VIP0 : FIQ_STATUS : 0x4810551c = 0x00000000
[m3vpss ] VIP1 : FIQ_STATUS : 0x48105a1c = 0x00000000
[m3vpss ] VPDMA: LIST_BUSY   : 0x4810d00c = 0x00000000
[m3vpss ]
[m3vpss ]
[m3vpss ] 240995: CAPTURE: Fields = 20518 (fps = 229, CPU Load = 0)
[m3vpss ] 240995: CAPTURE: Num Resets = 0 (Avg 0 ms per reset)
[m3vpss ] 240995: SYSTEM : FREE SPACE : System Heap      = 68048 B, Mbx = 10239 msgs)
[m3vpss ] 240995: SYSTEM : FREE SPACE : SR0 Heap         = 8713728 B (8 MB)
[m3vpss ] 240995: SYSTEM : FREE SPACE : Frame Buffer     = 221762432 B (211 MB)
[m3vpss ] 240996: SYSTEM : FREE SPACE : Bitstream Buffer = 205787008 B (196 MB)
[m3vpss ] 240996: SYSTEM : FREE SPACE : Tiler Buffer     = 224 B (0 MB) - TILER OFF
[m3vpss ]
[m3vpss ] *** [DEI0    ] DEI Statistics ***
[m3vpss ]
[m3vpss ] Elasped Time           : 89 secs
[m3vpss ] Total Fields Processed : 20514
[m3vpss ] Total Fields FPS       : 653 FPS
[m3vpss ]
[m3vpss ]
[m3vpss ] CH | In Recv In Reject In Process Out[0] Out[1] Out[2] Out[3] Out[4] Skip Out[0] Skip Out[1] Skip Out[2] Skip Out[3] Skip Out[4] User Out[0] User Out[1] User Out[2] User Out[3] User Out[4] Latency
[m3vpss ] Num | FPS     FPS       FPS        FPS    FPS    FPS    FPS    FPS       FPS         FPS         FPS         FPS         FPS       Skip FPS    Skip FPS    Skip FPS    Skip FPS    Skip FPS   Min / Max
[m3vpss ] -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
[m3vpss ]    0 |      50         0         50      0      0      0      0      0          50          50           0           0           0           0           0           0           0           0 14 / 31
[m3vpss ]    1 |      60         0         60      0      0      0      0      0          60          59           0           0           0           0           0           0           0           0 16 / 29
[m3vpss ]    2 |      60         0         60      0      0      0      0      0          60          59           0           0           0           0           0           0           0           0 16 / 29
[m3vpss ]    3 |      60         0         60      0      0      0      0      0          60          59           0           0           0           0           0           0           0           0 16 / 29
[m3vpss ]
[m3video]      246999: HDVICP-ID:0
[m3video] All percentage figures are based off totalElapsedTime
[m3video]               totalAcquire2wait :0 %
[m3video]               totalWait2Isr :0 %
[m3video]               totalIsr2Done :0 %
[m3video]               totalWait2Done :0 %
[m3video]               totalDone2Release :0 %
[m3video]               totalAcquire2Release :0 %
[m3video]               totalAcq2acqDelay :0 %
[m3video]               totalElapsedTime in msec :       0
[m3video]               numAccessCnt:       0
[m3video]              IVA-FPS :       0
[m3video]              Average time spent per frame in microsec:       0
[m3video]      247000: HDVICP-ID:1
[m3video] All percentage figures are based off totalElapsedTime
[m3video]               totalAcquire2wait :0 %
[m3video]               totalWait2Isr :0 %
[m3video]               totalIsr2Done :0 %
[m3video]               totalWait2Done :0 %
[m3video]               totalDone2Release :0 %
[m3video]               totalAcquire2Release :0 %
[m3video]               totalAcq2acqDelay :0 %
[m3video]               totalElapsedTime in msec :       0
[m3video]               numAccessCnt:       0
[m3video]              IVA-FPS :       0
[m3video]              Average time spent per frame in microsec:       0
[m3video]      247000: HDVICP-ID:2
[m3video] All percentage figures are based off totalElapsedTime
[m3video]               totalAcquire2wait :0 %
[m3video]               totalWait2Isr :0 %
[m3video]               totalIsr2Done :0 %
[m3video]               totalWait2Done :0 %
[m3video]               totalDone2Release :0 %
[m3video]               totalAcquire2Release :0 %
[m3video]               totalAcq2acqDelay :0 %
[m3video]               totalElapsedTime in msec :       0
[m3video]               numAccessCnt:       0
[m3video]              IVA-FPS :       0
[m3video]              Average time spent per frame in microsec:       0
[m3video]
[m3video] *** ENCODE Statistics ***
[m3video]
[m3video] Elasped Time           : 247 secs
[m3video]
[m3video]
[m3video] CH | In Recv In Skip In User Out Latency
[m3video] Num | FPS     FPS     Skip FPS FPS Min / Max
[m3video] --------------------------------------------
[m3video]    0 |       0       0        0   0   0 /   0
[m3video]    1 |       0       0        0   0   0 /   0
[m3video]    2 |       0       0        0   0   0 /   0
[m3video]    3 |       0       0        0   0   0 /   0
[m3video]
[m3video] Multi Channel Encode Average Submit Batch Size
[m3video] Max Submit Batch Size : 24
[m3video] IVAHD_0 Average Batch Size : 0
[m3video] IVAHD_0 Max achieved Batch Size : 0
[m3video] IVAHD_1 Average Batch Size : 0
[m3video] IVAHD_1 Max achieved Batch Size : 0
[m3video] IVAHD_2 Average Batch Size : 0
[m3video] IVAHD_2 Max achieved Batch Size : 0
[m3video]
[m3video] Multi Channel Encode Batch break Stats
[m3video] Total Number of Batches created: 0
[m3video] All numbers are based off total number of Batches created
[m3video]       Batch breaks due to batch sizeexceeding limit: 0 %
[m3video]       Batch breaks due to ReqObj Que being empty: 0 %
[m3video]       Batch breaks due to changed resolution class: 0 %
[m3video]       Batch breaks due to interlace and progressivecontent mix: 0 %
[m3video]       Batch breaks due to channel repeat: 0 %
[m3video]       Batch breaks due to different codec: 0 %
[m3video] Total Number of Batches created: 0
[m3video] All numbers are based off total number of Batches created
[m3video]       Batch breaks due to batch sizeexceeding limit: 0 %
[m3video]       Batch breaks due to ReqObj Que being empty: 0 %
[m3video]       Batch breaks due to changed resolution class: 0 %
[m3video]       Batch breaks due to interlace and progressivecontent mix: 0 %
[m3video]       Batch breaks due to channel repeat: 0 %
[m3video]       Batch breaks due to different codec: 0 %
[m3video] Total Number of Batches created: 0
[m3video] All numbers are based off total number of Batches created
[m3video]       Batch breaks due to batch sizeexceeding limit: 0 %
[m3video]       Batch breaks due to ReqObj Que being empty: 0 %
[m3video]       Batch breaks due to changed resolution class: 0 %
[m3video]       Batch breaks due to interlace and progressivecontent mix: 0 %
[m3video]       Batch breaks due to channel repeat: 0 %
[m3video]       Batch breaks due to different codec: 0 %
[m3vpss ]
[m3vpss ] 250004: LOAD: CPU: 4.9% HWI: 0.8%, SWI:0.7%
[m3vpss ]
[m3vpss ] 250005: LOAD: TSK: CAPTURE             : 0.4%
[m3vpss ] 250005: LOAD: TSK: DEI0                : 1.8%
[m3vpss ] 250005: LOAD: TSK: MISC                : 1.2%
[m3vpss ]
[m3video]
[m3video] 250505: LOAD: CPU: 1.5% HWI: 0.3%, SWI:0.4%
[m3video]
[m3video] 250505: LOAD: TSK: IPC_IN_M30          : 0.1%
[m3video] 250506: LOAD: TSK: ENC0                : 0.4%
[m3video] 250506: LOAD: TSK: MISC                : 0.3%
[m3video]
[c6xdsp ]
[c6xdsp ] 250400: LOAD: CPU: 0.2% HWI: 0.0%, SWI:0.0%
[c6xdsp ]
[c6xdsp ] 250400: LOAD: TSK: MISC                : 0.2%
[c6xdsp ]

*** Encode Bitstream Received Statistics ***

Elased time = 100.0 secs

[host]

*** SCD Frame Results Received Statistics ***

Elased time = 113.9 secs

CH | Bitrate (Kbps) | FPS | Width (max/min) | Height (max/min)
----------------------------------------------------------------------------------

=============
Run-Time Menu
=============

i: Print detailed system information
s: Core Status: Active/In-active
f: Switch IVA Channel Map

e: Stop Demo

DVRRDK question on processors loading

Thomas Lo — Fri, 31 May 2013 11:10:51 GMT

The platform I am using is DVRRDK 3.0 and 816x DVR.

If I have a chain of capture -> nsf -> dei -> dsp -> smms -> display,
|------------------|
the CPU loading of m3vpss, m3video and c6xdsp are about 40%, 1% and 15%

but if I modify it to: capture -> nsf -> dei -> enc,
|--------------> swms -> display
the CPU loading becomes m3vpss, m3video and c6xdsp are about 70%, 50% and 1%

and if I add the dsp osd back, capture -> nsf -> dei -> dsp -> enc,
|--------------> swms -> display
the CPU loading becomes m3vpss, m3video and c6xdsp are about 87%, 50% and 40%

The output from DEI to DSP or encoder is 16 ch 720x576 and 360x288 at 25 fps
is the serious increase in loading of m3vpss and c6xdsp normal?
or is there is something that I have set wrongly causing this?

Thanks

ALSA arecord

Holger Eberhard102906 — Wed, 19 Jun 2013 12:37:47 GMT

We use DVR_RDK 03.00.00.00, UDWorks platform.
We try to record audio with ALSA arecord from TLV320AIC3101.

Recording 1 channel (Mono) works fine:
arecord --device=plughw:0,1 --duration=20 /media/sda1/test.wav &

Also recording a stereo channel works fine:
arecord --device=plughw:0,1 --duration=20 --channels=2 /media/sda1/test.wav &

The recorded files can be played with MediaPlayer or other tools.

But we have problems if we want to use separate files:
arecord --device=plughw:0,1 --duration=20 --channels=2 -separate-channels /media/sda1/test1.wav /media/sda1/test2.wav &

The *.wav result can not be played with MediaPlayer or other. But it is possible to playback with ALSA aplay.
It seems that the format is raw data pcm.
Has anybody experience with this issue ?

How to remove the reboot logo

Eric Mao — Wed, 19 Jun 2013 05:47:00 GMT

Hi all

I use DM8168 EVM, DVRRDK_03.00。 when the console type command reboot , the on -chip HDMI port will display ti logo, i want to know how to remove the logo or use my own logo?

Thanks very much for Brijesh Jadav and Nick Reed's advice to resolve the problem of showing the logo on LCD(DVO2) om EVM814x.

zhichao tan60372 — Sat, 02 Feb 2013 07:52:11 GMT

Hello Brijesh Jadav and Nick Reed:

Thanks very much for you advice to resolve the problem of showing the logo on LCD(DVO2) om EVM814x. Now its work ok.

According to your advice,I have modiyed the code,and in fact, It should Ok at the begin,But Because I show the penguin default,and the code:

Firmware.c (drivers\video) :

void *video_hw_init()
{

--------

/* clear the frame buffer for with the backgroung color */
memset((void *) FRAME_BUFFER_ADDRESS,LOGO_BGCOLOR, FRAME_SIZE);

---------

}

And:

Logo.h (include) 5374 2012/12/12

#ifdef CONFIG_480P
#define WIDTH 720
#define HEIGHT 480
#elif defined CONFIG_720P
#define WIDTH 1280
#define HEIGHT 720
#else
#define WIDTH 1920
#define HEIGHT 1080
#endif

My lcd is 1024*600,so When I still use the default parameter will result the data which will copy to framebuffer buffer will wrong.

Thanks very much.Thank you !!!

DM8168 Multiple decoding of D1

Holger Eberhard102906 — Mon, 17 Jun 2013 12:06:28 GMT

We use DM8168 / DVRRDK 03.00.00.00.
Currently we test decoding and displaying of IP-camera RTSP streams.

Frame size: 720x576
Intra frame period: 1 Sec.
Constant bit rate: 1 Mbps
Maximum frame rate: 5 or 15 fps

Using 4 IP cameras in parallel is possible without problems.
Using 8 IP cameras in parallel is also possible.
More than 8 cameras produces a lot of the following output:
"[m3video] DECLINK:ERROR in Declink_h264DecodeFrameBatch.Status[-1]"

Is the number of parallel decoding limited by the decoder ?
Has anybody experience with this issue ?

Changing memory definitions for DSP OMX component (vlpb)

Gabi Gvili — Wed, 02 Nov 2011 11:33:06 GMT

Hi Archith,

I am trying to make my OMX example capture-dsp-display based on 2 TI OMX examples capture-encode and c6xtest.
The capture is done to a video in HD 1080p format (frame buffer is of size 1920x1080x3).
Changing the OMX DSP component input and output buffers causes problems of insufficient memory as follows:

VLPB: Error in OMX_AllocateBuffer() : OMX_ErrorInsufficientResources

after looking at the EZSDK memory map in http://processors.wiki.ti.com/index.php/EZSDK_Memory_Map
I see that there is a shared memory region for Host and MC-HDVPSS of 188MB which called IPC_SR_FRAME_BUFFERS which uses to allocate all video buffers

I have a few questions regarding this issue.

Q1. What is TI recommended suggestion to overcome this problem?

Q2. Can i instruct the OMX DSP component to allocate buffers in another region?

Q3. Is it possible to add the DSP to the shared region IPC_SR_FRAME_BUFFERS (together with host and MC-HDVPSS)? As anyway i intend to process the captured frame on the DSP and this way i can avoid moving data from one memory area to the other.

Q4. If the answer to Q3 is positive, what should i do in order to use this region for DSP OMX buffer allocation?

Thanks,

Gabi

OMX: TI8168 VLPB vs RPE vs codec engine latency issues

Gabi Gvili — Wed, 19 Dec 2012 09:55:08 GMT

Hi,

I am using TI8168 SOC, i have build an OMX chain of capture->dei->VLPB(on DSP)->dei->display.
I use the DSP to perform image enhancement, also i checked OMX chain of capture->dei->dei->display (NO VLPB) for reference, i receive the following results:

IMAGE SIZE FRAME RATE LATENCY(glass to glass)

No VLPB 60 100 msec

480p/576p 50 200 msec

720p 30 300 msec

I can't understand what causes such a high latency, since all OMX buffers are in shared region 2 and there is no data copying from core to core.
process of 1 frame in 480p takes 20 msec the addition of 100 msec in latency is equivalent to 5 frames processing time penalty for using VLPB.
process of 1 frame in 720p takes 33.33 msec here the addition of 200 msec in latency is equivalent to 6 frames processing time penalty for using VLPB.
My questions are as follows:
1. What may cause such a big latency?
2. Is there a way to reduce this latency for this use case?
3. Is using codec engine or RPE instead of VLPB OMX component for accessing the DSP may reduce the latency?

Thanks,
Gabi

After we plug one more 720P60 camera,the live555 server in dm8168 will be unnormal.Why?

SuitJune Young — Sun, 16 Jun 2013 04:48:33 GMT

Hello,TI man!

We use live555 to be a live stream server in our dm8168 custom board.

And when we plug three 720P60 camera,and send 3 720P60 video/audio mix stream.The video in VLC is normal.

But when we plug FOUR 720P60 HD camera,and send same 3720P60 video/audio mix stream(2 Cam Stream and 1 Multiviewer).The Video in VLC is not smooth.

What may cause this problem?More Camera will lag the Softmosaic?

We use DVRRDK 3.0.

Thanks for any reply.

Test in DM8127

Christiano Belli — Tue, 18 Jun 2013 12:16:22 GMT

Hello, I have a TI8148/DM8127 kit from Appropho. I need get a image from my host A8 file system, send the image to DSP, process the image and get the process time. How is the faster way to do this? Any suggestions?

pcie flow control

jianping jiang — Tue, 18 Jun 2013 07:26:15 GMT

hello
I'm using the dm8168 as a root complex.The DM8168 and a FPGA are connected by a pcie(V2.0).As a master device,the DM8168 is writing a frame(1920*1080p60) of image data to FPGA through pcie.But,the rate of pcie is faster than 2.5Gbps ,and the FPGA processing speed is only 256Mbit clock.Half of one frame(1920*1080p60) of image data will be lost by detecting.So,could i configure the pcie flow control in some register or other place when i receive a freedback command from FPGA,such the Lane Skew Register->FC_DISABLE or other register?If I can ,how can I config it and which place receive this order in the pcie protocol?

packet delivery on DM816X

Jack1234 — Tue, 18 Jun 2013 03:35:57 GMT

hello TI-friends,

rdk 3.0, dm816x EVM

As I type cat /proc/net/dev in EVM, I got following and we can found the packet drop when receiving.

Inter-| Receive | Transmit
face |bytes packets errs drop fifo frame compressed multicast|bytes packets errs drop fifo colls carrier compressed
lo: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
eth0: 168529179 674731 0 1345 0 0 0 3254 8629026 78671 0 0 0 0 0 0

I try to type command in server and got following and found no drop when transmitting

Inter-| Receive | Transmit
face |bytes packets errs drop fifo frame compressed multicast|bytes packets errs drop fifo colls carrier compressed
lo: 3705126 5842 0 0 0 0 0 0 3705126 5842 0 0 0 0 0 0
eth0:3303327054 757512352 0 0 0 0 0 0 2487358823 1990552107 0 0 0 0 0 0

I try the above even I connect to only one PC directly.

Did you have any idea?

How to use sata dma on dm8168

echo yang — Fri, 14 Jun 2013 08:33:18 GMT

Hello,

I have allocated frame buffers in cmem module. And I want to store the frames to Sata hard disk.

When I use fwrite to do this, the speed is too slow(about 20MB/s,while the video format is 720p60 YUV422).

I heared that directly access sata controller(using sata dma) may improve the speed. But I cannot find any information on how to do that.

Is there anyone who can tell me how I can solve the problem or give some docs or links I should read?

My board is dm8168evm with EZSDK5.05. And the SATA hard disk is 7200rpm and 500G.

Thanks,

Yang.

memory corruption bug in ilclient_utils.c

Richard Voigt — Mon, 17 Jun 2013 20:29:25 GMT

I found this in the capture_encode sample, but most of the OpenMAX samples seem to use the same file so it may affect others.

pAppDataPtr->deiILComp->outPortParams =
 malloc (sizeof (IL_CLIENT_INPORT_PARAMS) *
 pAppDataPtr->deiILComp->numOutport);
 memset (pAppDataPtr->deiILComp->outPortParams, 0x0,
 pAppDataPtr->deiILComp->numOutport *
 sizeof (IL_CLIENT_OUTPORT_PARAMS));

The size for malloc is computed using the wrong data type, with the result that all accesses, starting with the memset, write beyond the allocated area.

The bug is repeated for encILComp.

This is in version omx_05_02_00_46 which is being currently distributed by Z3 with their development kits.

Color is incorrect from TI8168 16bit VOUT1 output

hui liang — Wed, 05 Jun 2013 07:32:08 GMT

Hi all:

We use TI8168 platform, SDK is ezsdk_dm816x-evm_5_04_00_11_setuplinux。

Our application is:

Capture DVI RGB input from VIN0. The captured video is bound as texture using Graphics_SDK_4_06_00_02 and bc-cat-0.2.0.

And we neet draw 2D/3D graphics over video texture using OpenGL ES, they are output from 24bit VOUT0 and 16bit VOUT1.The data in framebuffer is RGB888.

The hardware architecture is:

Now the result is:

LCD1 display is correct, and the color is incorrect on LCD2 display. VOUT0 is configured RGB888 and VOUT1 is configured yuv422spuv because only 16bit.The configures are:

system ("echo 0 > /sys/devices/platform/vpss/graphics0/enabled");

system ("echo 0 > /sys/devices/platform/vpss/display0/enabled");

system ("echo 0 > /sys/devices/platform/vpss/display1/enabled");

system ("echo 5 > /sys/devices/platform/vpss/system/tiedvencs");

system ("echo doublediscrete,yuv422spuv,1/1/1/1> /sys/devices/platform/vpss/display0/output");

system ("echo 2:hdmi,dvo2 > /sys/devices/platform/vpss/graphics0/nodes");

system ("echo 1 > /sys/devices/platform/vpss/display0/enabled");

system ("echo 1 > /sys/devices/platform/vpss/display1/enabled");

system ("echo 1 > /sys/devices/platform/vpss/graphics0/enabled");

The ti81xxhdmi module is not loaded.

The FPGA use the followed formula to switch the YUV422SPUV to RGB888:

G = Y– 0.698(Cr – 128) – 0.336(Cb – 128)

R = Y + 1.371(Cr – 128)

B = Y + 1.732(Cb – 128)

We don’t know why the color error occur?

Thanks!

What may cause M3 codec don't send h264 bitstream?

SuitJune Young — Fri, 14 Jun 2013 03:56:13 GMT

Hello,TI er!

I embedded a CallBack funtion to IpcBitsInLinkHLOS LINK to send a sem to signal our thread to receive h.264 bitstream,but after our board run for a while,about 10minutes,the CallBack funtion don't run anymore.It seems the m3 codec don't work any longer.m3 codec's cpu load drops to about 8%.

The rdk we use is 3.0

[m3vpss ]
[c6xdsp ]
[m3video] 380401: LOAD: CPU: 8.1% HWI: 1.2%, SWI:1.0%
[m3vpss ] 380394: LOAD: CPU: 28.6% HWI: 4.5%, SWI:2.0%
[c6xdsp ] 480677: LOAD: CPU: 2.0% HWI: 0.2%, SWI:0.1%
[m3video]
[m3vpss ]
[c6xdsp ]
[m3video] 380401: LOAD: TSK: IPC_IN_M30 : 0.9%
[m3vpss ] 380394: LOAD: TSK: IPC_OUT_M30 : 1.5%
[c6xdsp ] 480677: LOAD: TSK: IPC_FRAMES_IN0 : 0.1%
[m3video] 380401: LOAD: TSK: IPC_BITS_OUT0 : 0.4%
[m3vpss ] 380395: LOAD: TSK: IPC_FRAMES_OUT0 : 0.6%
[c6xdsp ] 480677: LOAD: TSK: IPC_FRAMES_IN1 : 0.1%
[m3video] 380401: LOAD: TSK: ENC0 : 1.8%
[m3vpss ] 380395: LOAD: TSK: IPC_FRAMES_OUT1 : 0.6%
[c6xdsp ] 480677: LOAD: TSK: MISC : 1.5%
[m3video] 380401: LOAD: TSK: DEC0 : 0.7%
[m3vpss ] 380395: LOAD: TSK: CAPTURE : 0.8%
[c6xdsp ]
[m3video] 380402: LOAD: TSK: ENC_PROCESS_TSK_1 : 0.8%
[m3vpss ] 380395: LOAD: TSK: NSF0 : 3.0%
[m3video] 380402: LOAD: TSK: ENC_PROCESS_TSK_2 : 0.8%
[m3vpss ] 380395: LOAD: TSK: DISPLAY0 : 0.6%

[m3video] 380402: LOAD: TSK: MISC : 0.5%
[m3vpss ] 380395: LOAD: TSK: DISPLAY1 : 0.4%
root@dm816x:/mnt/opt/dvr_rdk/ti816x/bin# [m3video]
[m3vpss ] 380395: LOAD: TSK: DISPLAY2 : 0.2%
[m3vpss ] 380395: LOAD: TSK: NULL0 : 1.3%
[m3vpss ] 380396: LOAD: TSK: DUP0 : 0.2%
[m3vpss ] 380396: LOAD: TSK: DUP1 : 0.3%
[m3vpss ] 380396: LOAD: TSK: DUP2 : 0.3%
[m3vpss ] 380396: LOAD: TSK: DUP3 : 0.8%
[m3vpss ] 380396: LOAD: TSK: Scalar0 : 1.0%
[m3vpss ] 380397: LOAD: TSK: SWMS0 : 2.3%
[m3vpss ] 380397: LOAD: TSK: SWMS1 : 1.1%
[m3vpss ] 380397: LOAD: TSK: SWMS2 : 0.3%
[m3vpss ] 380397: LOAD: TSK: MERGE0 : 0.2%
[m3vpss ] 380397: LOAD: TSK: MERGE1 : 0.5%
[m3vpss ] 380397: LOAD: TSK: MERGE2 : 0.7%
[m3vpss ] 380397: LOAD: TSK: SELECT0 : 0.8%
[m3vpss ] 380397: LOAD: TSK: SELECT1 : 0.7%
[m3vpss ] 380398: LOAD: TSK: SELECT2 : 0.5%
[m3vpss ] 380398: LOAD: TSK: MISC : 3.4%
[m3vpss ]

What may cause this problem?thanks for any reply.

C6A816x Ethernet Boot MAC address

Stephen Turner — Fri, 03 Dec 2010 22:04:34 GMT

I have read the Tech Ref manual regarding Ethernet boot.

How is the Ethernet MAC address set?.

I read something about it being set by EFUSE, but I can't find any info on what that is.

-steve

Kernel Boot-Log errors

Christian Barth — Thu, 13 Jun 2013 09:02:45 GMT

Hi,

I have some error in my kernel startup sequence, which cannot be solved.

omap_voltage_domain_lookup: Voltage driver init not yet happened.Faulting!

_omap_mux_get_by_name: Could not find signal i2c2_scl.i2c2_scl

_omap_mux_get_by_name: Could not find signal i2c2_sda.i2c2_sda

ti81xx_register_mcasp: platform not supported

Cannot clk_get ck_32

pm_dbg_init: only OMAP3 supported

omap_voltage_late_init: Voltage driver support not added

EZSDK: 5.05.02.00 with PSP 04.04.00.02 on a custom board

u-boot splash screen

rob duffy — Mon, 17 Jun 2013 09:24:05 GMT

We’re using u-boot to boot (from SD card) a custom-designed AM3894 board driving a custom designed 1080p screen which is single-mode i.e. it will only lock/sync to a 1080p signal.We’re driving our screen system from the on-chip HDMI port. We want to have a boot splash screen, but u-boot as it is only seems to configure the VPSS and HDMI to 720p for the boot splash screen, which our screen system can’t lock to or display properly. Looking at the sources, we noticed in the file

u-boot/include/logo.h

the line

#define CONFIG_720P

which in the same file is used to set WIDTH and HEIGHT macros. If neither CONFIG_720P, or CONFIG_480P, are defined, WIDTH and HEIGHT are defined as 1920 and 1080, so commenting out

#define CONFIG_720P

looks like it should give us what we want. We tried this and rebuilt u-boot, but it still doesn’t work, although the display does change, and the VPSS fails to.come up and eventually halts the boot.

It seems probable that other changes are needed in setting up the VPSS and HDMI subsystems: can anyone point us to documentation on this or offer any assistance?

We’re using u-boot sources from:

ti-ezsdk_dm816x-evm_5_04_00_11

which is

u-boot-2010.06-psp04.04.00.01

Any replies much appreciated..

Some question about tying HDMI and VGA after system bootup

John Wang2 — Mon, 17 Jun 2013 09:08:58 GMT

Dear all,

I am using DVRRDK V04.00.00.03.

What I am trying to do is to tied HDMI out and VGA output. ( show same content on VGA with HDMI )

By running DEC+DIS usecase in run.sh, I can successfully tied them by modifying:

//Vdis_tiedVencInit(VDIS_DEV_HDCOMP, VDIS_DEV_DVO2, &vdisParams);

Vdis_tiedVencInit(VDIS_DEV_HDMI, VDIS_DEV_HDCOMP, &vdisParams);

Everything work good, I can see same frame-buffer and video on both VGA & HDMI.

But, that is my final objective...

I need VGA & HDMI to be tied right after the time system boot up before any chain application launch. (run.sh .etc)

Here are what I tried:

echo 0 > /sys/devices/platform/vpss/display0/enabled
echo 0 > /sys/devices/platform/vpss/display3/enabled
echo component,rgb888 > /sys/devices/platform/vpss/display3/output
echo 148500,1920/88/148/44,1080/4/36/5,1 > /sys/devices/platform/vpss/display3/timings
echo 3 > /sys/devices/platform/vpss/system/tiedvencs
echo 2:hdmi,hdcomp > /sys/devices/platform/vpss/graphics0/nodes

After these settings, I run fb program which would draw something on FB0.

Now problem comes,I can see normal video on HDMI output.

But on VGA output, here is the result: (I have 3 monitors)

AOC VGA: good. Same content with HDMI

ViewSonic VGA: the picture right-shift seriously. and half of picture is cut.

ASUS VGA: NO any signal...

What I am doing is just change VGA cable among three monitor.

Once I launch run.sh Dec+Dis usecase, all three VGAs work good and perfectly tied with HDMI.

Why there is such difference on each monitor?

Can you please advise what setting I was missing ?

Or what action I should do?

Thanks a lot.

- John

Support for OMX_UseEGLImage?

Richard Voigt — Thu, 30 May 2013 22:59:46 GMT

I have a DM8169 development kit and have successfully gotten OpenMAX examples and my own OpenGL ES code running. Now I'm ready to combine capture with OpenMAX IL and blending with OpenGL ES. For this to work, OpenMAX needs to place the video streams into OpenGL ES textures, because using the ARM core to copy blocks this size just takes too long -- the video processor should be able to DMA the frames directly to the PowerVR texture memory and not pass through the ARM core on the way. (This works well on Raspberry Pi, except using a file video source instead of capture input. I turned to DaVinci because it has two video input ports.)

Looking at the omx directory in the EZ-SDK, it appears that UseEGLImage is unimplemented and instead will be a null function pointer in every TI component. Have I missed something and the capability really is there? What component would I use? If I'm right and UseEGLImage isn't implemented (I call foul to claim support for OpenMAX, OpenGLES, EGL and not include the plumbing between them), is it planned? How hard would it be to add this to the video processing code running on the coprocessors?

If TI will not be including UseEGLImage support for the DM816x, can I composite OpenGL content with a video stream by using the layering features? What is necessary to make that happen (the examples outright disable the graphics layers with the remark that this is necessary if the video is to be made visible). And is it possible to capture the composited result for encoding and transmission over Ethernet, or is composition using layers strictly restricted to video output. Also, which outputs benefit from layer composition? on-chip HDMI? Video output ports used for composite?

I can understand that a $2000+ development kit won't be as easy to set up as a $39 Raspberry Pi, because of lower volume and fewer users polishing the experience. But for it not to even support the same functionality is very disappointing.