I am working with DM8168 and I don't have PHY for my EMAC module.
I am not looking for Ethernet boot so I hope the point mentioned in errata is not of much worry for me.
Currently I am facing issue to get the ethernet up at 1 Gbps. I have a FPGA that handles for the PHY part and my current status is the Loopback mode for EMAC works fine however if I disable loopback and check for data on line using scope then I don't see any activity.
Seems like EMAC is not throwing data on lines.
Any idea if there is any known issue or some quick checks.
I got things working. The Errata mentions about the solution for Ethernet boot where as it is not limited to boot. In all cases for Ethernet to be up at 1 Gbps, external clock from PHY is initially required.
I got the EMAC working but I see issues with it when I do POR on my system.
Does anybody know any issues with DM8168 when POR is asserted?
I see that OCMC memory is not cleared out on POR.I also see EMAC acts differently when I am trying to ping using uboot.
Any information on this will be appreciated.
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