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TI Home » TI E2E Community » Support Forums » Digital Signal Processors (DSP) » DaVinci™ Video Processors » DM816x, C6A816x and AM389x Processors Forum » SDRAM Timing 3 Register
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SDRAM Timing 3 Register

SDRAM Timing 3 Register

This question is not answered
Anjli Behl
Posted by Anjli Behl
on May 10 2012 22:55 PM
Prodigy430 points

 Hi DM8168 champs!!

The "Technical Reference Manual SPRUGX8-1 July 2011 - Tables 7-32 and 7-44 SDRAM Timing 3 Register" show that T_RASMAX must be programmed to Fh. The spread sheet "C6A8168 DDR calculate sheet", gives the value 8 instead. What is the reason to program Fh for that parameter? Also, "Table 7-33 DDR PHY Control Register" shows that RL is programmed to Max RL (CAS latency + 7 -1 = 17). Could this cause a timing problem if this field is programmed to a lower value (CAS +1 -1 = 11 for example)?

Thanks!

 Anjli

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  • MarcPyne
    Posted by MarcPyne
    on May 15 2012 16:34 PM
    Mastermind23505 points

    Anjli,

    Please refer to the updated DDR Registers spreadsheet on the DDR Init wiki page; it has Fh for that parameter as well.

    http://processors.wiki.ti.com/index.php/DM816x_C6A816x_AM389x_DDR3_Init

    Regards,
    Marc

    Please mark this Forum post as answered via the Verify Answer button below if it helps answer your question.  Thanks!

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