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use L2 cache on the dsp side of DM8168

Hello,

I am working on dm8168evm with ezsdk5.05.

I want to capture 720p60 video frames and do some process on the dsp side,then transmit it back to display.I have modified the saLoopBack(linux example) and video copy(codec engine example) examples to do this. But I cannot allocate memory in L2 cache on the dsp side.

Except wiki pages and xdocs, I referred the links

http://e2e.ti.com/support/embedded/bios/f/355/p/122205/436485.aspx#436485

http://e2e.ti.com/support/embedded/linux/f/354/p/7283/28490.aspx#28490

But I still cannot get memory from L2.

Here is the related codes.

/////////////////*-------------codec part------------------*/

/*-------videnc_copy_ti_priv.h---------*/

typedef struct VIDENCCOPY_TI_Obj {
    IALG_Obj    alg;            /* MUST be first field of all XDAS algs */
    IDMA3_Handle dmaHandle1D1D8B;  /* DMA logical channel for 1D to 1D xfers */
    XDAS_Int8   *workBuf;
    XDAS_UInt32  workBufLen; 
} VIDENCCOPY_TI_Obj;


/*----------------videnc_copy.c------------------*/

/*
 *  ======== VIDENCCOPY_TI_activate ========
 */
Void VIDENCCOPY_TI_activate(IALG_Handle handle)
{
    Log_print1(Diags_ENTRY, "[+E] VIDENCCOPY_TI_activate(0x%x)", (IArg)handle);
}


/*
 *  ======== VIDENCCOPY_TI_deactivate ========
 */
Void VIDENCCOPY_TI_deactivate(IALG_Handle handle)
{
    Log_print1(Diags_ENTRY, "[+E] VIDENCCOPY_TI_deactivate(0x%x)",
            (IArg)handle);
}


/*
 *  ======== VIDENCCOPY_TI_alloc ========
 */
Int VIDENCCOPY_TI_alloc(const IALG_Params *algParams,
    IALG_Fxns **pf, IALG_MemRec memTab[])
{
    Registry_Result   result;


    /*
     *  No need to reference count for Registry_addModule(), since there
     *  is no way to remove the module.
     */
    if (regInit == 0) {
        /* Register this module for logging */
        result = Registry_addModule(&ti_sdo_ce_examples_codecs_videnc_copy_desc,
                MODNAME);
        Assert_isTrue(result == Registry_SUCCESS, (Assert_Id)NULL);

        if (result == Registry_SUCCESS) {
            /* Set the diags mask to the CE default */
            CESettings_init();
            CESettings_setDiags(MODNAME);
        }
        regInit = 1;
    }

    Log_print3(Diags_ENTRY, "[+E] VIDENCCOPY_TI_alloc(0x%x, 0x%x, 0x%x)",
            (IArg)algParams, (IArg)pf, (IArg)memTab);

    /* Request memory for my object */
    memTab[0].size = sizeof(VIDENCCOPY_TI_Obj);
    memTab[0].alignment = 0;
    memTab[0].space = IALG_EXTERNAL;
    memTab[0].attrs = IALG_PERSIST;

    memTab[1].size = 0x20000*sizeof(XDAS_Int8);//128KB
    memTab[1].alignment = 0;
    memTab[1].attrs = IALG_SCRATCH;
    memTab[1].space = IALG_DARAM0;

    return (1);
}


/*
 *  ======== VIDENCCOPY_TI_free ========
 */
Int VIDENCCOPY_TI_free(IALG_Handle handle, IALG_MemRec memTab[])
{
    VIDENCCOPY_TI_Obj *inst = (VIDENCCOPY_TI_Obj *)handle;
    Log_print2(Diags_ENTRY, "[+E] VIDENCCOPY_TI_free(0x%lx, 0x%lx)",
            (IArg)handle, (IArg)memTab);

    VIDENCCOPY_TI_alloc(NULL, NULL, memTab);

    memTab[0].size = sizeof(VIDENCCOPY_TI_Obj);
    memTab[0].base = inst;

    memTab[1].size = 0x20000*sizeof(XDAS_Int8);
    memTab[1].base = inst->workBuf;
    return (2);
}


/*
 *  ======== VIDENCCOPY_TI_initObj ========
 */
Int VIDENCCOPY_TI_initObj(IALG_Handle handle,
    const IALG_MemRec memTab[], IALG_Handle p,
    const IALG_Params *algParams)
{
    VIDENCCOPY_TI_Obj *inst = (VIDENCCOPY_TI_Obj *)handle;

    inst->workBuf = memTab[1].base;
    inst->workBufLen = 0x20000*sizeof(XDAS_Int8);

    Log_print4(Diags_ENTRY,
            "[+E] VIDENCCOPY_TI_initObj(0x%x, 0x%x, 0x%x, 0x%x)",
            (IArg)handle, (IArg)memTab, (IArg)p, (IArg)algParams);

    return (IALG_EOK);
}

And in the VIDENCCOPY_TI_process function, memtab[1] is used as below:

XDAS_Int8  *tmpbuf;

ACPY3_Params params;
VIDENCCOPY_TI_Obj *videncObj = (VIDENCCOPY_TI_Obj *)h;
tmpbuf = videncObj->workBuf;
Log_print1(Diags_USER2, "[+2] tmpbuf address > "
                " %x ", (IArg)tmpbuf);

When using dma to copy buffer to tmpbuf or invert,"(Uint32)tmpbuf+0x30000000" is used.

 

////////////////*------------server part-----------------*/

/*--------------heaps.cfg-----------------*/

I modified the size of  ".INT_HEAP" to 0x28000;    //160kB

var internalHeapSize = 0x28000;    //160kB


/*---------------all_syslink.cfg---------------------*/

var DSKT2 = xdc.useModule('ti.sdo.fc.dskt2.DSKT2');
DSKT2.DARAM0 = "INT_HEAP";
DSKT2.DARAM1 = "INT_HEAP";
DSKT2.DARAM2 = "INT_HEAP";
DSKT2.SARAM0 = "INT_HEAP";
DSKT2.SARAM1 = "INT_HEAP";
DSKT2.SARAM2 = "INT_HEAP";
DSKT2.ESDATA = "EXTALG_HEAP";
DSKT2.EPROG = "EXTALG_HEAP";
DSKT2.IPROG = "INT_HEAP";
DSKT2.DSKT2_HEAP = "EXT_HEAP";

DSKT2.ALLOW_EXTERNAL_SCRATCH = false;//true;//false;
DSKT2.SARAM_SCRATCH_SIZES[0] = 4 * 8192;  // 32k scratch for groupId 0

"DMAN3.queuePri = [2,2];" is added just as the link above said.


//////////////////*---------app part----------*/

The codec is used as below

Engine_initAttrs(&attrs);

ce = Engine_open(engineName, &attrs, NULL);

enc = VIDENC_create(ce, encoderName, NULL);

encDynParams.size = sizeof(encDynParams);
encStatus.size    = sizeof(encStatus);

status = VIDENC_control(enc, XDM_GETSTATUS, &encDynParams, &encStatus);

status = VIDENC_process(enc, &inBufDesc, &encodedBufDesc, &encInArgs,&encOutArgs);


When running the application with CE_DEBUG=2, I got the message

"[DSP] [t=+000,066 us] [tid=0x9955f170] ti.sdo.ce.examples.codecs.videnc_copy: [+2] tmpbuf address >  0 ".

It seems that I still cannot get L2 cache used to do video process.

I cannot find where the problem lies.

Hope for help.

Regards,

Yang

  • Hello Yang,

    Is this the only message you get when running with CE_DEBUG=2?

    "[DSP] [t=+000,066 us] [tid=0x9955f170] ti.sdo.ce.examples.codecs.videnc_copy: [+2] tmpbuf address >  0 ".

    If there is more trace, could you please attach a log with all the trace output from running with CE_DEBUG=2?  Just from this one trace message, it looks to me like the memory allocation of your buffer must have failed.

    Thanks,

        Janet

  • Hi,

    You should make sure that there is enough memory to allocate for shared scratch memory for the group that you are creating this codec instance in.

    Additionally, you may want to configure DSKT2's scratch size configuration for the group-id in your DSP server configuration, something like: 

    DSKT2.DARAM_SCRATCH_SIZES[<group-id>] =<some-size greater or equal to the size of the memTab[1].size + sum-of-all sizes of the other entries that request scratch allocation

    You might look here for some information: http://processors.wiki.ti.com/index.php/Framework_Components_DSKT2_User%27s_Guide

    Murat

  • Hi,Janet

    The messages are listed below

    [t=0x001b882a] [tid=0x4007d000] ti.sdo.ce.video.VIDENC: [+E] VIDENC_control> Enter (handle=0xa8a50, id=0, dynParams=0xbe89cb44 (size=0x28), status=0xbe89c94c (size=0x90)
    [t=0x001b885f] [tid=0x4007d000] ti.sdo.ce.VISA: [+4] VISA_getMaxMsgSize(0xa8a50): returning 0x1000
    [t=0x001b887a] [tid=0x4007d000] ti.sdo.ce.VISA: [+5] VISA_allocMsg> Allocating message for messageId=0x00010004
    [t=0x001b8899] [tid=0x4007d000] ti.sdo.ce.VISA: [+E5] VISA_call(visa=0xa8a50, msg=0x40257000): messageId=0x00010004, command=0x1
    [DSP] [t=+1723,998 us] [tid=0x9955f170] ti.sdo.ce.node: [+5] NODE> 0x9955e7a8 call(algHandle=0x9955e8a8, msg=0x9f708000); messageId=0x00010004
    [DSP] [t=+000,136 us] [tid=0x9955f170] ti.sdo.ce.video.VIDENC: [+E] VIDENC_control> Enter (handle=0x9955e8a8, id=0, dynParams=0x9f708034 (size=0x28), status=0x9f70805c (size=0x90)
    [DSP] [t=+000,127 us] [tid=0x9955f170] ti.sdo.ce.VISA: [+5] VISA_enter(visa=0x9955e8a8): algHandle = 0x9955e8e0
    [DSP] [t=+000,083 us] [tid=0x9955f170] ti.sdo.ce.alg.Algorithm: [+E] Algorithm_activate> Enter(alg=0x9955e8e0)
    [DSP] [t=+000,079 us] [tid=0x9955f170] ti.sdo.fc.dskt2: [+E] DSKT2_activateAlg> Enter (scratchId=0, alg=0x980007b0)
    [DSP] [t=+000,093 us] [tid=0x9955f170] ti.sdo.fc.dskt2: [+2] DSKT2_activateAlg> Last active algorithm 0x0, current algorithm to be activated 0x980007b0
    [DSP] [t=+000,105 us] [tid=0x9955f170] ti.sdo.fc.dskt2: [+4] DSKT2_activateAlg> Real activation of algorithm 0x980007b0
    [DSP] [t=+000,085 us] [tid=0x9955f170] ti.sdo.ce.examples.codecs.videnc_copy: [+E] VIDENCCOPY_TI_activate(0x980007b0)
    [DSP] [t=+000,081 us] [tid=0x9955f170] ti.sdo.fc.dskt2: [+X] DSKT2_activateAlg> Exit
    [DSP] [t=+000,061 us] [tid=0x9955f170] ti.sdo.ce.alg.Algorithm: [+X] Algorithm_activate> Exit
    [DSP] [t=+000,068 us] [tid=0x9955f170] ti.sdo.ce.examples.codecs.videnc_copy: [+E] VIDENCCOPY_TI_control(0x980007b0, 0x0, 0x9f708034, 0x9f70805c)
    [DSP] [t=+000,117 us] [tid=0x9955f170] ti.sdo.ce.VISA: [+5] VISA_exit(visa=0x9955e8a8): algHandle = 0x9955e8e0
    [DSP] [t=+000,080 us] [tid=0x9955f170] ti.sdo.ce.alg.Algorithm: [+E] Algorithm_deactivate> Enter(alg=0x9955e8e0)
    [DSP] [t=+000,080 us] [tid=0x9955f170] ti.sdo.fc.dskt2: [+E] DSKT2_deactivateAlg> Enter (scratchId=0, algHandle=0x980007b0)
    [DSP] [t=+000,087 us] [tid=0x9955f170] ti.sdo.fc.dskt2: [+4] DSKT2_deactivateAlg> Lazy deactivate of algorithm 0x980007b0
    [DSP] [t=+000,092 us] [tid=0x9955f170] ti.sdo.fc.dskt2: [+X] DSKT2_deactivateAlg> Exit
    [DSP] [t=+000,065 us] [tid=0x9955f170] ti.sdo.ce.alg.Algorithm: [+X] Algorithm_deactivate> Exit
    [DSP] [t=+000,067 us] [tid=0x9955f170] ti.sdo.ce.video.VIDENC: [+X] VIDENC_control> Exit (handle=0x9955e8a8, retVal=0x0)
    [DSP] [t=+000,089 us] [tid=0x9955f170] ti.sdo.ce.node: [+5] NODE> returned from call(algHandle=0x9955e8a8, msg=0x9f708000); messageId=0x00010004
    [t=0x001b95d0] [tid=0x4007d000] ti.sdo.ce.Engine: [+X] Engine_fwriteTrace> returning count [2296]
    [t=0x001b95ef] [tid=0x4007d000] ti.sdo.ce.VISA: [+X5] VISA_call Completed: messageId=0x00010004, command=0x1, return(status=0)
    [t=0x001b9615] [tid=0x4007d000] ti.sdo.ce.VISA: [+5] VISA_freeMsg(0xa8a50, 0x40257000): Freeing message with messageId=0x00010004
    [t=0x001b9635] [tid=0x4007d000] ti.sdo.ce.video.VIDENC: [+X] VIDENC_control> Exit (handle=0xa8a50, retVal=0x0)
    [t=0x002121b0] [tid=0x4007d000] xdc.runtime.Main: [+1] App-> Processing frame 0...
    [t=0x002121d4] [tid=0x4007d000] ti.sdo.ce.video.VIDENC: [+E] VIDENC_process> Enter (handle=0xa8a50, inBufs=0xbe89cb78, outBufs=0xbe89cb6c, inArgs=0xbe89cb98, outArgs=0xbe89c8b0)
    [t=0x00212202] [tid=0x4007d000] ti.sdo.ce.VISA: [+4] VISA_getMaxMsgSize(0xa8a50): returning 0x1000
    [t=0x00212235] [tid=0x4007d000] ti.sdo.ce.VISA: [+5] VISA_allocMsg> Allocating message for messageId=0x00010005
    [t=0x0021225b] [tid=0x4007d000] ti.sdo.ce.VISA: [+E5] VISA_call(visa=0xa8a50, msg=0x40257000): messageId=0x00010005, command=0x0
    [DSP] [t=+371,468 us] [tid=0x9955f170] ti.sdo.ce.node: [+5] NODE> 0x9955e7a8 call(algHandle=0x9955e8a8, msg=0x9f708000); messageId=0x00010005
    [DSP] [t=+000,132 us] [tid=0x9955f170] ti.sdo.ce.osal.Memory: [+E] Memory_cacheInv> Enter(addr=0x97000000, sizeInBytes=1843200)
    [DSP] [t=+000,414 us] [tid=0x9955f170] ti.sdo.ce.osal.Memory: [+X] Memory_cacheInv> return
    [DSP] [t=+000,066 us] [tid=0x9955f170] ti.sdo.ce.osal.Memory: [+E] Memory_cacheInv> Enter(addr=0x97708000, sizeInBytes=1843200)
    [DSP] [t=+000,402 us] [tid=0x9955f170] ti.sdo.ce.osal.Memory: [+X] Memory_cacheInv> return
    [DSP] [t=+000,067 us] [tid=0x9955f170] ti.sdo.ce.video.VIDENC: [+E] VIDENC_process> Enter (handle=0x9955e8a8, inBufs=0x9956187c, outBufs=0x99561888, inArgs=0x9f708138, outArgs=0x9f70813c)
    [DSP] [t=+000,130 us] [tid=0x9955f170] ti.sdo.ce.VISA: [+5] VISA_enter(visa=0x9955e8a8): algHandle = 0x9955e8e0
    [DSP] [t=+000,083 us] [tid=0x9955f170] ti.sdo.ce.alg.Algorithm: [+E] Algorithm_activate> Enter(alg=0x9955e8e0)
    [DSP] [t=+000,077 us] [tid=0x9955f170] ti.sdo.fc.dskt2: [+E] DSKT2_activateAlg> Enter (scratchId=0, alg=0x980007b0)
    [DSP] [t=+000,091 us] [tid=0x9955f170] ti.sdo.fc.dskt2: [+2] DSKT2_activateAlg> Last active algorithm 0x980007b0, current algorithm to be activated 0x980007b0
    [DSP] [t=+000,113 us] [tid=0x9955f170] ti.sdo.fc.dskt2: [+2] DSKT2_activateAlg> Activation of algorithm 0x980007b0 not required, already active
    [DSP] [t=+000,094 us] [tid=0x9955f170] ti.sdo.fc.dskt2: [+X] DSKT2_activateAlg> Exit
    [DSP] [t=+000,062 us] [tid=0x9955f170] ti.sdo.ce.alg.Algorithm: [+X] Algorithm_activate> Exit
    [DSP] [t=+000,069 us] [tid=0x9955f170] ti.sdo.ce.examples.codecs.videnc_copy: [+2] tmpbuf address >  0
    [DSP] [t=+000,076 us] [tid=0x9955f170] ti.sdo.ce.examples.codecs.videnc_copy: [+2] inbuf code >  4294967172
    [DSP] [t=+000,078 us] [tid=0x9955f170] ti.sdo.ce.examples.codecs.videnc_copy: [+E] VIDENCCOPY_TI_process(0x980007b0, 0x9956187c, 0x99561888, 0x9f708138, 0x9f70813c)
    [DSP] [t=+000,455 us] [tid=0x9955f170] ti.sdo.ce.examples.codecs.videnc_copy: [+2] VIDENCCOPY_TI_process> ACPY3 Processed 131072 bytes.
    [DSP] [t=+003,088 us] [tid=0x9955f170] ti.sdo.ce.examples.codecs.videnc_copy: [+2] VIDENCCOPY_TI_process> ACPY3 Processed 131072 bytes.
    [DSP] [t=+003,087 us] [tid=0x9955f170] ti.sdo.ce.examples.codecs.videnc_copy: [+2] VIDENCCOPY_TI_process> ACPY3 Processed 131072 bytes.
    [DSP] [t=+003,085 us] [tid=0x9955f170] ti.sdo.ce.examples.codecs.videnc_copy: [+2] VIDENCCOPY_TI_process> ACPY3 Processed 131072 bytes.
    [DSP] [t=+003,086 us] [tid=0x9955f170] ti.sdo.ce.examples.codecs.videnc_copy: [+2] VIDENCCOPY_TI_process> ACPY3 Processed 131072 bytes.
    [DSP] [t=+003,087 us] [tid=0x9955f170] ti.sdo.ce.examples.codecs.videnc_copy: [+2] VIDENCCOPY_TI_process> ACPY3 Processed 131072 bytes.
    [DSP] [t=+003,087 us] [tid=0x9955f170] ti.sdo.ce.examples.codecs.videnc_copy: [+2] VIDENCCOPY_TI_process> ACPY3 Processed 131072 bytes.
    [DSP] [t=+003,086 us] [tid=0x9955f170] ti.sdo.ce.examples.codecs.videnc_copy: [+2] VIDENCCOPY_TI_process> ACPY3 Processed 131072 bytes.
    [DSP] [t=+003,081 us] [tid=0x9955f170] ti.sdo.ce.examples.codecs.videnc_copy: [+2] VIDENCCOPY_TI_process> ACPY3 Processed 131072 bytes.
    [DSP] [t=+003,081 us] [tid=0x9955f170] ti.sdo.ce.examples.codecs.videnc_copy: [+2] VIDENCCOPY_TI_process> ACPY3 Processed 131072 bytes.
    [DSP] [t=+003,081 us] [tid=0x9955f170] ti.sdo.ce.examples.codecs.videnc_copy: [+2] VIDENCCOPY_TI_process> ACPY3 Processed 131072 bytes.
    [DSP] [t=+003,082 us] [tid=0x9955f170] ti.sdo.ce.examples.codecs.videnc_copy: [+2] VIDENCCOPY_TI_process> ACPY3 Processed 131072 bytes.
    [DSP] [t=+003,081 us] [tid=0x9955f170] ti.sdo.ce.examples.codecs.videnc_copy: [+2] VIDENCCOPY_TI_process> ACPY3 Processed 131072 bytes.
    [DSP] [t=+003,080 us] [tid=0x9955f170] ti.sdo.ce.examples.codecs.videnc_copy: [+2] VIDENCCOPY_TI_process> ACPY3 Processed 131072 bytes.
    [DSP] [t=+002,770 us] [tid=0x9955f170] ti.sdo.ce.examples.codecs.videnc_copy: [+2] VIDENCCOPY_TI_process> ACPY3 Processed 8192 bytes.
    [DSP] [t=+000,271 us] [tid=0x9955f170] ti.sdo.ce.VISA: [+5] VISA_exit(visa=0x9955e8a8): algHandle = 0x9955e8e0
    [DSP] [t=+000,087 us] [tid=0x9955f170] ti.sdo.ce.alg.Algorithm: [+E] Algorithm_deactivate> Enter(alg=0x9955e8e0)
    [DSP] [t=+000,082 us] [tid=0x9955f170] ti.sdo.fc.dskt2: [+E] DSKT2_deactivateAlg> Enter (scratchId=0, algHandle=0x980007b0)
    [DSP] [t=+000,087 us] [tid=0x9955f170] ti.sdo.fc.dskt2: [+4] DSKT2_deactivateAlg> Lazy deactivate of algorithm 0x980007b0
    [DSP] [t=+000,091 us] [tid=0x9955f170] ti.sdo.fc.dskt2: [+X] DSKT2_deactivateAlg> Exit
    [DSP] [t=+000,065 us] [tid=0x9955f170] ti.sdo.ce.alg.Algorithm: [+X] Algorithm_deactivate> Exit
    [DSP] [t=+000,068 us] [tid=0x9955f170] ti.sdo.ce.video.VIDENC: [+X] VIDENC_process> Exit (handle=0x9955e8a8, retVal=0x0)
    [DSP] [t=+000,086 us] [tid=0x9955f170] ti.sdo.ce.osal.Memory: [+E] Memory_cacheWb> Enter(addr=0x97708000, sizeInBytes=1843200)
    [DSP] [t=+000,401 us] [tid=0x9955f170] ti.sdo.ce.osal.Memory: [+X] Memory_cacheWb> return
    [DSP] [t=+000,075 us] [tid=0x9955f170] ti.sdo.ce.node: [+5] NODE> returned from call(algHandle=0x9955e8a8, msg=0x9f708000); messageId=0x00010005
    [t=0x0021e1ed] [tid=0x4007d000] ti.sdo.ce.Engine: [+X] Engine_fwriteTrace> returning count [5141]
    [t=0x0021e20b] [tid=0x4007d000] ti.sdo.ce.VISA: [+X5] VISA_call Completed: messageId=0x00010005, command=0x0, return(status=0)
    [t=0x0021e236] [tid=0x4007d000] ti.sdo.ce.VISA: [+5] VISA_freeMsg(0xa8a50, 0x40257000): Freeing message with messageId=0x00010005
    [t=0x0021e256] [tid=0x4007d000] ti.sdo.ce.video.VIDENC: [+X] VIDENC_process> Exit (handle=0xa8a50, retVal=0x0)
    [t=0x0021e270] [tid=0x4007d000] xdc.runtime.Main: [+2] App-> Encoder frame 0 process returned - 0x0

    Here is all the message 8508.log.txt.

  • Thank you,

    Murat

    I reread the DSKT2's user guide.But problem is still alive.

    When memTab[1].attrs=IALG_SCRATCH, I dont how to write the function

    (*DSKT2_CacheWBInvFxn)(Ptr blockPtr, size_t byteCnt, Bool wait).

    So I have changed the Memory attributes to IALG_PERSIST, But  the tmpbuf is still 0.

    Regards,

    Yang

  • I have solved the problem.

    The return value of the function VIDENCCOPY_TI_alloc should be 2 instead of 1.

    Thanks

    Yang

  • Glad you were able to solve the issue and thanks for your post.

     

  • Hello Yang,

    I am also facing the same issue regarding capture-process-display using saLoopBack example combined  with video_copy example app in codec engine.

    It will be very helpful if you could share your code to me.

    Any help is appreciated.

    Thanks,

    Srikanta