• State Resolved
  • Locked Locked
  • Replies 5 replies
  • Subscribers 100 subscribers
  • Views 897 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

USB3.0 - No SuperSpeed endpoint companion found

Holger Eberhard102906
Genius 4570 points

we use DVRRDK 03.00.00.00 based software (Kernel version 2.6.37+) and Udworks based hardware design.

We have added Renesas uPD720202 USB3.0 host controller via PCI.

PCI is working and firmware download to uPD720202 via PCI interface is successful.

But we get "No SuperSpeed endpoint companion found" message (PFA log file).

If we connect USB3.0 or 2.0 device, nothing is detected.

Does anybody use USB3.0 via PCI in this environment with this linux version ?

1106.teraterm.log 
 
[BOP13] $ insmod xhci-hcd.ko
PCI: enabling device 0000:01:00.0 (0140 -> 0142)
xhci_hcd 0000:01:00.0: xHCI Host Controller
xhci_hcd 0000:01:00.0: new USB bus registered, assigned bus number 3
xhci_hcd 0000:01:00.0: irq 48, io mem 0x20000000
usb usb3: No SuperSpeed endpoint companion for config 1  interface 0 altsetting 0 ep 129: using minimum values
usb usb3: New USB device found, idVendor=1d6b, idProduct=0003
usb usb3: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb3: Product: xHCI Host Controller
usb usb3: Manufacturer: Linux 2.6.37+ xhci_hcd
usb usb3: SerialNumber: 0000:01:00.0
Jun 24 15:27:46 b2-10319001 user.info kernel:  for device 0001:00:00 ...
Jun 24 15:27:46 b2-10319001 user.debug kernel: done.
Jun 24 15:27:46 b2-10319001 userhub 3-0:1.0: USB hub found

 

 

  • 0
    Genius 4570 points

    0385.teraterm.log 
    $ dmesg
Linux version 2.6.37+ (heb@heb) (gcc version 4.3.3 (Sourcery G++ Lite 2009q1-203) ) #4 Thu Aug 14 17:11:44 CEST 2014
CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c53c7f
CPU: VIPT nonaliasing data cache, VIPT aliasing instruction cache
Machine: ti8168_dvr
vram size = 20971520 at 0x0
reserved size = 20971520 at 0x0
FB: Reserving 20971520 bytes SDRAM for VRAM
Memory policy: ECC disabled, Data cache writeback
OMAP chip is TI8168 2.0
On node 0 totalpages: 148480
free_area_init_node: node 0, pgdat 8054f85c, node_mem_map 8058a000
  Normal zone: 2680 pages used for memmap
  Normal zone: 0 pages reserved
  Normal zone: 110984 pages, LIFO batch:31
  HighMem zone: 312 pages used for memmap
  HighMem zone: 34504 pages, LIFO batch:7
pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768
pcpu-alloc: [0] 0 
Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 145488
Kernel command line: console=ttyO2,115200n8 init=/linuxrc root=/dev/ram0 rw initrd=0xC2000000,120M ip=192.168.72.200:192.168.72.100:192.168.1.1:255.255.255.0::eth0:off vram=20M notifyk.vpssm3_sva=0xBEE00000 mem=128M mem=472M@0xC0000000 vmalloc=580M
PID hash table entries: 2048 (order: 1, 8192 bytes)
Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
Memory: 128MB 452MB = 580MB total
Memory: 460116k/460116k available, 154284k reserved, 139264K highmem
Virtual kernel memory layout:
    vector  : 0xffff0000 - 0xffff1000   (   4 kB)
    fixmap  : 0xfff00000 - 0xfffe0000   ( 896 kB)
    DMA     : 0xffc00000 - 0xffe00000   (   2 MB)
    vmalloc : 0xd4000000 - 0xf8000000   ( 576 MB)
    lowmem  : 0x80000000 - 0xd3c00000   (1340 MB)
    pkmap   : 0x7fe00000 - 0x80000000   (   2 MB)
    modules : 0x7f000000 - 0x7fe00000   (  14 MB)
      .init : 0x80008000 - 0x8003a000   ( 200 kB)
      .text : 0x8003a000 - 0x80503000   (4900 kB)
      .data : 0x80504000 - 0x80550fc0   ( 308 kB)
SLUB: Genslabs=11, HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
NR_IRQS:407
IRQ: Found an INTC at 0xfa200000 (revision 5.0) with 128 interrupts
Total of 128 interrupts on 1 active controller
GPMC revision 6.0
Trying to install interrupt handler for IRQ400
Trying to install interrupt handler for IRQ401
Trying to install interrupt handler for IRQ402
Trying to install interrupt handler for IRQ403
Trying to install interrupt handler for IRQ404
Trying to install interrupt handler for IRQ405
Trying to install interrupt handler for IRQ406
Trying to install type control for IRQ407
Trying to set irq flags for IRQ407
OMAP clockevent source: GPTIMER1 at 27000000 Hz
Console: colour dummy device 80x30
Calibrating delay loop... 999.42 BogoMIPS (lpj=4997120)
pid_max: default: 32768 minimum: 301
Security Framework initialized
Mount-cache hash table entries: 512
CPU: Testing write buffer coherency: ok
devtmpfs: initialized
omap_voltage_early_init: voltage driver support not added
regulator: core version 0.5
regulator: dummy: 
NET: Registered protocol family 16
omap_voltage_domain_lookup: Voltage driver init not yet happened.Faulting!
omap_voltage_add_dev: VDD specified does not exist!
OMAP GPIO hardware version 0.1
OMAP GPIO hardware version 0.1

 drivers/spi/spi.c spi_init 
omap_mux_init: Add partition: #1: core, flags: 0
3-wired eeprom init done. (H/W ver:ffff)
_omap_mux_get_by_name: Could not find signal i2c2_scl.i2c2_scl
_omap_mux_get_by_name: Could not find signal i2c2_sda.i2c2_sda
registered ti816x_sr device
pm_dbg_init: only OMAP3 supported
registered ti81xx_vpss device
registered ti81xx_vidout device
registered ti81xx on-chip HDMI device
registered ti81xx_fb device

ti81xx_pcie: Invoking PCI BIOS...
ti81xx_pcie: Setting up Host Controller...
ti81xx_pcie: Register base mapped @0xd4020000
ti81xx_pcie: Starting PCI scan...
pci 0000:00:00.0: [104c:8888] type 1 class 0x000604
PCI: bus0: Fast back to back transfers disabled
pci 0000:01:00.0: [1912:0015] type 0 class 0x000c03
pci 0000:01:00.0: reg 10: [mem 0x00000000-0x00001fff 64bit]
pci 0000:01:00.0: PME# supported from D0 D3hot
pci 0000:01:00.0: PME# disabled
PCI: bus1: Fast back to back transfers disabled
pci 0000:00:00.0: BAR 8: assigned [mem 0x20000000-0x200fffff]
pci 0000:01:00.0: BAR 0: assigned [mem 0x20000000-0x20001fff 64bit]
pci 0000:01:00.0: BAR 0: set to [mem 0x20000000-0x20001fff 64bit] (PCI address [0x20000000-0x20001fff])
pci 0000:00:00.0: PCI bridge to [bus 01-01]
pci 0000:00:00.0:   bridge window [io  disabled]
pci 0000:00:00.0:   bridge window [mem 0x20000000-0x200fffff]
pci 0000:00:00.0:   bridge window [mem pref disabled]
PCI: enabling device 0000:00:00.0 (0140 -> 0143)
pci_bus 0000:00: resource 0 [mem 0x20000000-0x2fffffff]
pci_bus 0000:00: resource 1 [io  0x40000000-0x402fffff]
pci_bus 0000:01: resource 1 [mem 0x20000000-0x200fffff]

bio: create slab <bio-0> at 0
vgaarb: loaded
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
USBSS revision 4ea20809
registerd cppi-dma Intr @ IRQ 17
Cppi41 Init Done
omap_i2c omap_i2c.1: bus 1 rev4.0 at 400 kHz
regulator: pmbus_vr: 800 <--> 1050 mV at 1000 mV 
regulator: tps40400 probe done.
omap_i2c omap_i2c.2: bus 2 rev4.0 at 400 kHz
Advanced Linux Sound Architecture Driver Version 1.0.23.
Switching to clocksource gp timer
musb-hdrc: version 6.0, host, debug=0
musb-hdrc musb-hdrc.0: dma type: dma-cppi41
MUSB controller-0 revision 4ea20800
TxFifo Empty intr enabled
musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO Rx, HB-ISO Tx, SoftConn)
musb-hdrc: MHDRC RTL version 2.0 
musb-hdrc: setup fifo_mode 4
musb-hdrc: 28/31 max ep, 16384/16384 memory
musb-hdrc musb-hdrc.0: MUSB HDRC host driver
drivers/usb/core/inode.c: creating file 'devices'
drivers/usb/core/inode.c: creating file '001'
musb-hdrc musb-hdrc.0: new USB bus registered, assigned bus number 1
usb usb1: default language 0x0409
usb usb1: udev 1, busnum 1, minor = 0
usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb1: Product: MUSB HDRC host driver
usb usb1: Manufacturer: Linux 2.6.37+ musb-hcd
usb usb1: SerialNumber: musb-hdrc.0
usb usb1: usb_probe_device
usb usb1: configuration #1 chosen from 1 choice
usb usb1: adding 1-0:1.0 (config #1, interface 0)
hub 1-0:1.0: usb_probe_interface
hub 1-0:1.0: usb_probe_interface - got id
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 1 port detected
hub 1-0:1.0: standalone hub
hub 1-0:1.0: individual port power switching
hub 1-0:1.0: no over-current protection
hub 1-0:1.0: power on to power good time: 10ms
hub 1-0:1.0: local power source is good
hub 1-0:1.0: enabling power on all ports
drivers/usb/core/inode.c: creating file '001'
musb-hdrc musb-hdrc.0: USB Host mode controller at d401e000 using DMA, IRQ 18
Registered /proc/driver/musb_hdrc.0
musb-hdrc musb-hdrc.1: dma type: dma-cppi41
MUSB controller-1 revision 4ea20800
TxFifo Empty intr enabled
musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO Rx, HB-ISO Tx, SoftConn)
musb-hdrc: MHDRC RTL version 2.0 
musb-hdrc: setup fifo_mode 4
musb-hdrc: 28/31 max ep, 16384/16384 memory
musb-hdrc musb-hdrc.1: MUSB HDRC host driver
drivers/usb/core/inode.c: creating file '002'
musb-hdrc musb-hdrc.1: new USB bus registered, assigned bus number 2
usb usb2: default language 0x0409
usb usb2: udev 1, busnum 2, minor = 128
usb usb2: New USB device found, idVendor=1d6b, idProduct=0002
usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb2: Product: MUSB HDRC host driver
usb usb2: Manufacturer: Linux 2.6.37+ musb-hcd
usb usb2: SerialNumber: musb-hdrc.1
usb usb2: usb_probe_device
usb usb2: configuration #1 chosen from 1 choice
usb usb2: adding 2-0:1.0 (config #1, interface 0)
hub 2-0:1.0: usb_probe_interface
hub 2-0:1.0: usb_probe_interface - got id
hub 2-0:1.0: USB hub found
hub 2-0:1.0: 1 port detected
hub 2-0:1.0: standalone hub
hub 2-0:1.0: individual port power switching
hub 2-0:1.0: no over-current protection
hub 2-0:1.0: power on to power good time: 10ms
hub 2-0:1.0: local power source is good
hub 2-0:1.0: enabling power on all ports
drivers/usb/core/inode.c: creating file '001'
musb-hdrc musb-hdrc.1: USB Host mode controller at d4026800 using DMA, IRQ 19
Registered /proc/driver/musb_hdrc.1
NET: Registered protocol family 2
IP route cache hash table entries: 4096 (order: 2, 16384 bytes)
TCP established hash table entries: 16384 (order: 5, 131072 bytes)
TCP bind hash table entries: 16384 (order: 4, 65536 bytes)
TCP: Hash tables configured (established 16384 bind 16384)
TCP reno registered
UDP hash table entries: 256 (order: 0, 4096 bytes)
UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
NET: Registered protocol family 1
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
PCI: CLS 64 bytes, default 64
Trying to unpack rootfs image as initramfs...
rootfs image is not initramfs (no cpio magic); looks like an initrd
hub 1-0:1.0: state 7 ports 1 chg 0000 evt 0000
hub 2-0:1.0: state 7 ports 1 chg 0000 evt 0000
hub 1-0:1.0: state 7 ports 1 chg 0000 evt 0002
hub 1-0:1.0: port 1, status 0101, change 0001, 12 Mb/s
hub 1-0:1.0: debounce: port 1: total 100ms stable 100ms status 0x101
Freeing initrd memory: 122880K
NetWinder Floating Point Emulator V0.97 (double precision)
PMU: registered new PMU device of type 0
omap-iommu omap-iommu.0: ducati registered
omap-iommu omap-iommu.1: sys registered
usb 1-1: new high speed USB device using musb-hdrc and address 2
highmem bounce pool size: 64 pages
JFFS2 version 2.2. (NAND) © 2001-2006 Red Hat, Inc.
msgmni has been set to 866
io scheduler noop registered
io scheduler deadline registered
io scheduler cfq registered (default)
Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
omap_uart.0: ttyO0 at MMIO 0x48020000 (irq = 72) is a OMAP UART0
omap_uart.1: ttyO1 at MMIO 0x48022000 (irq = 73) is a OMAP UART1
omap_uart.2: ttyO2 at MMIO 0x48024000 (irq = 74) is a OMAP UART2
console [ttyO2] enabled
brd: module loaded
loop: module loaded
omap2-nand driver initializing
ONFI flash detected
NAND device: Maf ID: 0x2c, Chip ID: 0xb3 (Micron, )
 erasesize: 0x20000, writesize: 2048, oobsize: 64
Creating 11 MTD partitions on "omap2-nand.0":
0x000000000000-0x000000240000 : "U-Boot"
0x000000240000-0x000000280000 : "U-Boot Env"
0x000000280000-0x000000580000 : "Boot Splash"
0x000000580000-0x0000009c0000 : "Kernel"
0x0000009c0000-0x0000086c0000 : "File System"
0x0000086c0000-0x00000cee0000 : "Firmware Upload"
0x00000cee0000-0x00000cf20000 : "BOP Keys"
0x00000cf20000-0x00000cf60000 : "BOP Config"
0x00000cf60000-0x00000cfa0000 : "Web update notify"
0x00000cfa0000-0x00000d2c0000 : "Update header"
0x00000d2c0000-0x000040000000 : "Reserved"
usb 1-1: udev 2, busnum 1, minor = 1
usb 1-1: New USB device found, idVendor=0409, idProduct=005a
usb 1-1: New USB device strings: Mfr=0, Product=0, SerialNumber=0
usb 1-1: usb_probe_device
usb 1-1: configuration #1 chosen from 1 choice
usb 1-1: adding 1-1:1.0 (config #1, interface 0)
hub 1-1:1.0: usb_probe_interface
hub 1-1:1.0: usb_probe_interface - got id
hub 1-1:1.0: USB hub found
hub 1-1:1.0: 4 ports detected
hub 1-1:1.0: compound device; port removable status: RFFF
hub 1-1:1.0: individual port power switching
hub 1-1:1.0: individual port over-current protection
hub 1-1:1.0: Single TT
hub 1-1:1.0: TT requires at most 16 FS bit times (1332 ns)
hub 1-1:1.0: power on to power good time: 100ms
hub 1-1:1.0: local power source is good
hub 1-1:1.0: enabling power on all ports
drivers/usb/core/inode.c: creating file '002'
hub 1-0:1.0: state 7 ports 1 chg 0000 evt 0002
hub 1-0:1.0: port 1 enable change, status 00000503
davinci_mdio davinci_mdio.0: davinci mdio revision 1.6
davinci_mdio davinci_mdio.0: detected phy mask fffffffd
davinci_mdio.0: probed
davinci_mdio davinci_mdio.0: phy[1]: device 0:01, driver unknown
usbcore: registered new interface driver asix
usbcore: registered new interface driver cdc_ether
usbcore: registered new interface driver dm9601
Initializing USB Mass Storage driver...
usbcore: registered new interface driver usb-storage
USB Mass Storage support registered.
usbcore: registered new interface driver usbserial
USB Serial support registered for generic
usbcore: registered new interface driver usbserial_generic
usbserial: USB Serial Driver core
USB Serial support registered for FTDI USB Serial Device
usbcore: registered new interface driver ftdi_sio
ftdi_sio: v1.6.0:USB FTDI Serial Converters Driver
USB Serial support registered for pl2303
usbcore: registered new interface driver pl2303
pl2303: Prolific PL2303 USB to serial adaptor driver
mice: PS/2 mouse device common for all mice
hub 1-1:1.0: port 4: status 0101 change 0001
rtc-ds1307 1-0068: rtc core: registered ds1337 as rtc0
omap_rtc omap_rtc: rtc core: registered omap_rtc as rtc1
i2c /dev entries driver
Linux video capture interface: v2.00
usbcore: registered new interface driver uvcvideo
USB Video Class driver (v1.0.0)
OMAP Watchdog Timer Rev 0x00: initial timeout 60 sec
usbcore: registered new interface driver usbhid
usbhid: USB HID core driver
notify_init : notify drivercreated  for  remote proc id 2 at physical Address 0xbee00000
usbcore: registered new interface driver snd-usb-audio
Registered tvp5158 audio codec
asoc: tvp5158-hifi <-> davinci-mcasp.0 mapping ok
asoc: tlv320aic3x-hifi <-> davinci-mcasp.2 mapping ok
asoc: HDMI-DAI-CODEC <-> hdmi-dai mapping ok
ALSA device list:
  #0: TI81XX DVR
TCP cubic registered
NET: Registered protocol family 17
VFP support v0.3: implementor 41 architecture 3 part 30 variant c rev 3
omap_voltage_late_init: Voltage driver support not added
Power Management for TI81XX.
smartreflex-ti816x: ti816x_sr_probe done!
hub 1-1:1.0: state 7 ports 4 chg 0010 evt 0000
hub 1-1:1.0: port 4, status 0101, change 0000, 12 Mb/s
rtc-ds1307 1-0068: setting system clock to 2000-02-02 02:52:41 UTC (949459961)
usb 1-1.4: new high speed USB device using musb-hdrc and address 3
hub 1-1:1.0: port 4 not reset yet, waiting 10ms
usb 1-1.4: default language 0x0409
usb 1-1.4: udev 3, busnum 1, minor = 2
usb 1-1.4: New USB device found, idVendor=0b95, idProduct=772a
usb 1-1.4: New USB device strings: Mfr=1, Product=2, SerialNumber=3
usb 1-1.4: Product: AX88772 
usb 1-1.4: Manufacturer: ASIX Elec. Corp.
usb 1-1.4: SerialNumber: 000001
usb 1-1.4: usb_probe_device
usb 1-1.4: configuration #1 chosen from 1 choice
usb 1-1.4: adding 1-1.4:1.0 (config #1, interface 0)
asix 1-1.4:1.0: usb_probe_interface
asix 1-1.4:1.0: usb_probe_interface - got id
davinci_mdio davinci_mdio.0: resetting idled controller
net eth0: attached PHY driver [Generic PHY] (mii_bus:phy_addr=0:01, id=2430d91)
asix 1-1.4:1.0: eth2: register 'asix' at usb-musb-hdrc.0-1.4, ASIX AX88772 USB 2.0 Ethernet, 00:00:00:00:00:00
drivers/usb/core/inode.c: creating file '003'
IP-Config: Gateway not on directly connected network.
RAMDISK: gzip image found at block 0
PHY: 0:01 - Link is Up - 100/Full
VFS: Mounted root (ext2 filesystem) on device 1:0.
devtmpfs: mounted
Freeing init memory: 200K
libata version 3.00 loaded.
ahci: Unknown symbol ahci_ops (err 0)
ahci: Unknown symbol ahci_start_engine (err 0)
ahci: Unknown symbol ahci_interrupt (err 0)
ahci: Unknown symbol ahci_check_ready (err 0)
ahci: Unknown symbol ahci_kick_engine (err 0)
ahci: Unknown symbol ahci_set_em_messages (err 0)
ahci: Unknown symbol ahci_init_controller (err 0)
ahci: Unknown symbol ahci_shost_attrs (err 0)
ahci: Unknown symbol ahci_reset_controller (err 0)
ahci: Unknown symbol ahci_print_info (err 0)
ahci: Unknown symbol ahci_do_softreset (err 0)
ahci: Unknown symbol ahci_stop_engine (err 0)
ahci: Unknown symbol ahci_reset_em (err 0)
ahci: Unknown symbol ahci_sdev_attrs (err 0)
ahci: Unknown symbol ahci_save_initial_config (err 0)
ahci: Unknown symbol ahci_ignore_sss (err 0)
ahci ahci.0: forcing PORTS_IMPL to 0x3
ahci ahci.0: AHCI 0001.0100 32 slots 2 ports 3 Gbps 0x3 impl platform mode
ahci ahci.0: flags: ncq sntf pm led clo only pmp pio slum part ccc 
scsi0 : ahci_platform
scsi1 : ahci_platform
ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a150fff] port 0x100 irq 16
ata2: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a150fff] port 0x180 irq 16
ata1: SATA link down (SStatus 0 SControl 300)
ata2: SATA link down (SStatus 0 SControl 300)
SysLink version : 2.10.02.17
SysLink module created on Date:Aug  7 2014 Time:09:47:39
Trace enabled
Trace SetFailureReason enabled
DMA: Module install successful, device major num = 251 
DRV: Module install successful
DRV: Module built on Aug 11 2014 10:14:05 
[module] vpss probe done.
[module] ti81xxfb probe done.
eth2: link up, 100Mbps, full-duplex, lpa 0x45E1
eth2: link up, 100Mbps, full-duplex, lpa 0x45E1

PCI: enabling device 0000:01:00.0 (0140 -> 0142)
xhci_hcd 0000:01:00.0: xHCI Host Controller
drivers/usb/core/inode.c: creating file '003'
xhci_hcd 0000:01:00.0: new USB bus registered, assigned bus number 3
[XHCI FW Downloder] XHCI_FWDownLoadCheck
[XHCI FW Downloder] VendorID=1912, DeviceID=0015, Revision=0002
[XHCI FW Downloder] Device is 720201/202
[XHCI FW Downloder] --Revision 2
[XHCI FW Downloder] Firmware load OK
[XHCI FW Downloder] XHCI_FWDownLoad
[XHCI FW Downloder] PCICNF0F4 register = 00000000)
[XHCI FW Downloder] Result=00000000
xhci_hcd 0000:01:00.0: xHCI capability registers at d8f64000:
xhci_hcd 0000:01:00.0: CAPLENGTH AND HCIVERSION 0x1000020:
xhci_hcd 0000:01:00.0: CAPLENGTH: 0x20
xhci_hcd 0000:01:00.0: HCIVERSION: 0x100
xhci_hcd 0000:01:00.0: HCSPARAMS 1: 0x4000820
xhci_hcd 0000:01:00.0:   Max device slots: 32
xhci_hcd 0000:01:00.0:   Max interrupters: 8
xhci_hcd 0000:01:00.0:   Max ports: 4
xhci_hcd 0000:01:00.0: HCSPARAMS 2: 0x24000011
xhci_hcd 0000:01:00.0:   Isoc scheduling threshold: 1
xhci_hcd 0000:01:00.0:   Maximum allowed segments in event ring: 1
xhci_hcd 0000:01:00.0: HCSPARAMS 3 0x0:
xhci_hcd 0000:01:00.0:   Worst case U1 device exit latency: 0
xhci_hcd 0000:01:00.0:   Worst case U2 device exit latency: 0
xhci_hcd 0000:01:00.0: HCC PARAMS 0x14051cf:
xhci_hcd 0000:01:00.0:   HC generates 64 bit addresses
xhci_hcd 0000:01:00.0:   FIXME: more HCCPARAMS debugging
xhci_hcd 0000:01:00.0: RTSOFF 0x600:
xhci_hcd 0000:01:00.0: xHCI operational registers at d8f64020:
xhci_hcd 0000:01:00.0: USBCMD 0x0:
xhci_hcd 0000:01:00.0:   HC is being stopped
xhci_hcd 0000:01:00.0:   HC has finished hard reset
xhci_hcd 0000:01:00.0:   Event Interrupts disabled
xhci_hcd 0000:01:00.0:   Host System Error Interrupts disabled
xhci_hcd 0000:01:00.0:   HC has finished light reset
xhci_hcd 0000:01:00.0: USBSTS 0x1:
xhci_hcd 0000:01:00.0:   Event ring is empty
xhci_hcd 0000:01:00.0:   No Host System Error
xhci_hcd 0000:01:00.0:   HC is halted
xhci_hcd 0000:01:00.0: d8f64420 port status reg = 0x80
xhci_hcd 0000:01:00.0: d8f64424 port power reg = 0x0
xhci_hcd 0000:01:00.0: d8f64428 port link reg = 0x0
xhci_hcd 0000:01:00.0: d8f6442c port reserved reg = 0x0
xhci_hcd 0000:01:00.0: d8f64430 port status reg = 0x80
xhci_hcd 0000:01:00.0: d8f64434 port power reg = 0x0
xhci_hcd 0000:01:00.0: d8f64438 port link reg = 0x0
xhci_hcd 0000:01:00.0: d8f6443c port reserved reg = 0x0
xhci_hcd 0000:01:00.0: d8f64440 port status reg = 0x80
xhci_hcd 0000:01:00.0: d8f64444 port power reg = 0x0
xhci_hcd 0000:01:00.0: d8f64448 port link reg = 0x0
xhci_hcd 0000:01:00.0: d8f6444c port reserved reg = 0x0
xhci_hcd 0000:01:00.0: d8f64450 port status reg = 0x80
xhci_hcd 0000:01:00.0: d8f64454 port power reg = 0x0
xhci_hcd 0000:01:00.0: d8f64458 port link reg = 0x0
xhci_hcd 0000:01:00.0: d8f6445c port reserved reg = 0x0
xhci_hcd 0000:01:00.0: // Halt the HC
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hd8f64020, 32'h0, 4'hf);
xhci_hcd 0000:01:00.0: handshake done after 2000 microseconds.
xhci_hcd 0000:01:00.0: Resetting HCD
xhci_hcd 0000:01:00.0: // Reset the HC
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hd8f64020, 32'h2, 4'hf);
xhci_hcd 0000:01:00.0: handshake done after 9998024 microseconds.
xhci_hcd 0000:01:00.0: Wait for controller to be ready for doorbell rings
xhci_hcd 0000:01:00.0: handshake done after 1000000 microseconds.
xhci_hcd 0000:01:00.0: Reset complete
xhci_hcd 0000:01:00.0: Enabling 64-bit DMA addresses.
xhci_hcd 0000:01:00.0: Calling HCD init
xhci_hcd 0000:01:00.0: xhci_init
xhci_hcd 0000:01:00.0: xHCI doesn't need link TRB QUIRK
xhci_hcd 0000:01:00.0: Supported page size register = 0x1
xhci_hcd 0000:01:00.0: Supported page size of 4K
xhci_hcd 0000:01:00.0: HCD page size set to 4K
xhci_hcd 0000:01:00.0: // xHC can handle at most 32 device slots.
xhci_hcd 0000:01:00.0: // Setting Max device slots reg = 0x20.
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hd8f64058, 32'h20, 4'hf);
xhci_hcd 0000:01:00.0: // Device context base array address = 0xcedef000 (DMA), ffc14000 (virt)
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 64'hd8f64050, 64'hcedef000, 4'hf);
xhci_hcd 0000:01:00.0: Allocating ring at 840e5d40
xhci_hcd 0000:01:00.0: Allocating priv segment structure at 840e5d80
xhci_hcd 0000:01:00.0: // Allocating segment at ffc15000 (virtual) 0xcedee000 (DMA)
xhci_hcd 0000:01:00.0: Linking segment 0xcedee000 to segment 0xcedee000 (DMA)
xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment 840e5d80 (virtual), 0xcedee000 (DMA)
xhci_hcd 0000:01:00.0: Allocated command ring at 840e5d40
xhci_hcd 0000:01:00.0: First segment DMA is 0xcedee000
xhci_hcd 0000:01:00.0: // Setting command ring address to 0x20
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 64'hd8f64038, 64'hcedee001, 4'hf);
xhci_hcd 0000:01:00.0: // xHC command ring deq ptr low bits + flags = @00000000
xhci_hcd 0000:01:00.0: // xHC command ring deq ptr high bits = @00000000
xhci_hcd 0000:01:00.0: // Doorbell array is located at offset 0x800 from cap regs base addr
xhci_hcd 0000:01:00.0: // xHCI capability registers at d8f64000:
xhci_hcd 0000:01:00.0: // @d8f64000 = 0x1000020 (CAPLENGTH AND HCIVERSION)
xhci_hcd 0000:01:00.0: //   CAPLENGTH: 0x20
xhci_hcd 0000:01:00.0: // xHCI operational registers at d8f64020:
xhci_hcd 0000:01:00.0: // @d8f64018 = 0x600 RTSOFF
xhci_hcd 0000:01:00.0: // xHCI runtime registers at d8f64600:
xhci_hcd 0000:01:00.0: // @d8f64014 = 0x800 DBOFF
xhci_hcd 0000:01:00.0: // Doorbell array at d8f64800:
xhci_hcd 0000:01:00.0: xHCI runtime registers at d8f64600:
xhci_hcd 0000:01:00.0:   d8f64600: Microframe index = 0x0
xhci_hcd 0000:01:00.0: // Allocating event ring
xhci_hcd 0000:01:00.0: Allocating ring at 840e5e40
xhci_hcd 0000:01:00.0: Allocating priv segment structure at 840e5e80
xhci_hcd 0000:01:00.0: // Allocating segment at ffc15400 (virtual) 0xcedee400 (DMA)
xhci_hcd 0000:01:00.0: Linking segment 0xcedee400 to segment 0xcedee400 (DMA)
xhci_hcd 0000:01:00.0: TRB math tests passed.
xhci_hcd 0000:01:00.0: // Allocated event ring segment table at 0xceded000
xhci_hcd 0000:01:00.0: Set ERST to 0; private num segs = 1, virt addr = ffc16000, dma addr = 0xceded000
xhci_hcd 0000:01:00.0: // Write ERST size = 1 to ir_set 0 (some bits preserved)
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hd8f64628, 32'h1, 4'hf);
xhci_hcd 0000:01:00.0: // Set ERST entries to point to event ring.
xhci_hcd 0000:01:00.0: // Set ERST base address for ir_set 0 = 0xceded000
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 64'hd8f64630, 64'hceded000, 4'hf);
xhci_hcd 0000:01:00.0: // Write event ring dequeue pointer, preserving EHB bit
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 64'hd8f64638, 64'hcedee400, 4'hf);
xhci_hcd 0000:01:00.0: Wrote ERST address to ir_set 0.
xhci_hcd 0000:01:00.0: Allocating 4 scratchpad buffers
xhci_hcd 0000:01:00.0: Ext Cap d8f64510, port offset = 1, count = 2, revision = 0x3
xhci_hcd 0000:01:00.0: Ext Cap d8f64524, port offset = 3, count = 2, revision = 0x2
xhci_hcd 0000:01:00.0: Found 2 USB 2.0 ports and 2 USB 3.0 ports.
xhci_hcd 0000:01:00.0: USB 2.0 port at index 2, addr = d8f64440
xhci_hcd 0000:01:00.0: USB 2.0 port at index 3, addr = d8f64450
xhci_hcd 0000:01:00.0: USB 3.0 port at index 0, addr = d8f64420
xhci_hcd 0000:01:00.0: USB 3.0 port at index 1, addr = d8f64430
xhci_hcd 0000:01:00.0: Finished xhci_init
xhci_hcd 0000:01:00.0: Called HCD init
xhci_hcd 0000:01:00.0: Got SBRN 48
xhci_hcd 0000:01:00.0: MWI active
xhci_hcd 0000:01:00.0: Finished xhci_pci_reinit
xhci_hcd 0000:01:00.0: supports USB remote wakeup
xhci_hcd 0000:01:00.0: irq 48, io mem 0x20000000
xhci_hcd 0000:01:00.0: xhci_run
xhci_hcd 0000:01:00.0: Setting event ring polling timer
xhci_hcd 0000:01:00.0: Command ring memory map follows:
xhci_hcd 0000:01:00.0: @cedee000 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee010 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee020 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee030 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee040 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee050 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee060 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee070 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee080 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee090 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee0a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee0b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee0c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee0d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee0e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee0f0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee100 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee110 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee120 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee130 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee140 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee150 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee160 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee170 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee180 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee190 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee1a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee1b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee1c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee1d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee1e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee1f0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee200 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee210 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee220 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee230 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee240 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee250 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee260 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee270 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee280 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee290 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee2a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee2b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee2c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee2d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee2e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee2f0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee300 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee310 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee320 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee330 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee340 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee350 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee360 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee370 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee380 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee390 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee3a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee3b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee3c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee3d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee3e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee3f0 cedee000 00000000 00000000 00001802
xhci_hcd 0000:01:00.0:   Ring has not been updated
xhci_hcd 0000:01:00.0: Ring deq = ffc15000 (virt), 0xcedee000 (dma)
xhci_hcd 0000:01:00.0: Ring deq updated 0 times
xhci_hcd 0000:01:00.0: Ring enq = ffc15000 (virt), 0xcedee000 (dma)
xhci_hcd 0000:01:00.0: Ring enq updated 0 times
xhci_hcd 0000:01:00.0: // xHC command ring deq ptr low bits + flags = @00000000
xhci_hcd 0000:01:00.0: // xHC command ring deq ptr high bits = @00000000
xhci_hcd 0000:01:00.0: ERST memory map follows:
xhci_hcd 0000:01:00.0: @ceded000 cedee400 00000000 00000040 00000000
xhci_hcd 0000:01:00.0: Event ring:
xhci_hcd 0000:01:00.0: @cedee400 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee410 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee420 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee430 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee440 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee450 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee460 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee470 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee480 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee490 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee4a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee4b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee4c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee4d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee4e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee4f0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee500 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee510 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee520 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee530 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee540 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee550 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee560 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee570 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee580 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee590 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee5a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee5b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee5c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee5d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee5e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee5f0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee600 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee610 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee620 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee630 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee640 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee650 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee660 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee670 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee680 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee690 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee6a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee6b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee6c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee6d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee6e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee6f0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee700 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee710 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee720 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee730 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee740 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee750 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee760 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee770 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee780 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee790 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee7a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee7b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee7c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee7d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee7e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee7f0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0:   Ring has not been updated
xhci_hcd 0000:01:00.0: Ring deq = ffc15400 (virt), 0xcedee400 (dma)
xhci_hcd 0000:01:00.0: Ring deq updated 0 times
xhci_hcd 0000:01:00.0: Ring enq = ffc15400 (virt), 0xcedee400 (dma)
xhci_hcd 0000:01:00.0: Ring enq updated 0 times
xhci_hcd 0000:01:00.0: ERST deq = 64'hcedee400
xhci_hcd 0000:01:00.0: // Set the interrupt modulation register
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hd8f64624, 32'ha0, 4'hf);
xhci_hcd 0000:01:00.0: // Enable interrupts, cmd = 0x4.
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hd8f64020, 32'h4, 4'hf);
xhci_hcd 0000:01:00.0: // Enabling event ring interrupter d8f64620 by writing 0x2 to irq_pending
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hd8f64620, 32'h2, 4'hf);
xhci_hcd 0000:01:00.0:   d8f64620: ir_set[0]
xhci_hcd 0000:01:00.0:   d8f64620: ir_set.pending = 0x2
xhci_hcd 0000:01:00.0:   d8f64624: ir_set.control = 0xa0
xhci_hcd 0000:01:00.0:   d8f64628: ir_set.erst_size = 0x1
xhci_hcd 0000:01:00.0:   d8f64630: ir_set.erst_base = @ceded000
xhci_hcd 0000:01:00.0:   d8f64638: ir_set.erst_dequeue = @cedee400
xhci_hcd 0000:01:00.0: // Turn on HC, cmd = 0x5.
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hd8f64020, 32'h5, 4'hf);
xhci_hcd 0000:01:00.0: handshake done after 1994 microseconds.
xhci_hcd 0000:01:00.0: Finished xhci_run
usb usb3: No SuperSpeed endpoint companion for config 1  interface 0 altsetting 0 ep 129: using minimum values
usb usb3: default language 0x0409
usb usb3: udev 1, busnum 3, minor = 256
usb usb3: New USB device found, idVendor=1d6b, idProduct=0003
usb usb3: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb3: Product: xHCI Host Controller
usb usb3: Manufacturer: Linux 2.6.37+ xhci_hcd
usb usb3: SerialNumber: 0000:01:00.0
usb usb3: usb_probe_device
usb usb3: configuration #1 chosen from 1 choice
xHCI xhci_add_endpoint called for root hub
xHCI xhci_check_bandwidth called for root hub
usb usb3: adding 3-0:1.0 (config #1, interface 0)
hub 3-0:1.0: usb_probe_interface
hub 3-0:1.0: usb_probe_interface - got id
hub 3-0:1.0: USB hub found
hub 3-0:1.0: 4 ports detected
hub 3-0:1.0: standalone hub
hub 3-0:1.0: individual port power switching
hub 3-0:1.0: individual port over-current protection
hub 3-0:1.0: TT requires at most 8 FS bit times (666 ns)
hub 3-0:1.0: power on to power good time: 20ms
hub 3-0:1.0: local power source is good
hub 3-0:1.0: enabling power on all ports
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hd8f64420, 32'h280, 4'hf);
xhci_hcd 0000:01:00.0: set port power, actual port 0 status  = 0x1202a1
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hd8f64430, 32'h280, 4'hf);
xhci_hcd 0000:01:00.0: set port power, actual port 1 status  = 0x1202a1
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hd8f64440, 32'h280, 4'hf);
xhci_hcd 0000:01:00.0: set port power, actual port 2 status  = 0x1002a0
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hd8f64450, 32'h280, 4'hf);
xhci_hcd 0000:01:00.0: set port power, actual port 3 status  = 0x1002a0
drivers/usb/core/inode.c: creating file '001'
xhci_hcd 0000:01:00.0: get port status, actual port 0 status  = 0x120080
xhci_hcd 0000:01:00.0: Get port status returned 0x90000
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hd8f64420, 32'h20080, 4'hf);
xhci_hcd 0000:01:00.0: clear port connect change, actual port 0 status  = 0x100080
xhci_hcd 0000:01:00.0: get port status, actual port 1 status  = 0x120080
xhci_hcd 0000:01:00.0: Get port status returned 0x90000
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hd8f64430, 32'h20080, 4'hf);
xhci_hcd 0000:01:00.0: clear port connect change, actual port 1 status  = 0x100080
xhci_hcd 0000:01:00.0: get port status, actual port 2 status  = 0x100080
xhci_hcd 0000:01:00.0: Get port status returned 0x80000
xhci_hcd 0000:01:00.0: get port status, actual port 3 status  = 0x100080
xhci_hcd 0000:01:00.0: Get port status returned 0x80000
hub 3-0:1.0: state 7 ports 4 chg 0000 evt 0000
xhci_hcd 0000:01:00.0: Poll event ring: 4294961760
xhci_hcd 0000:01:00.0: op reg status = 0x18
xhci_hcd 0000:01:00.0: ir_set 0 pending = 0x3
xhci_hcd 0000:01:00.0: No-op commands handled = 0
xhci_hcd 0000:01:00.0: HC error bitmask = 0x0
xhci_hcd 0000:01:00.0: Event ring:
xhci_hcd 0000:01:00.0: @cedee400 01000000 00000000 01000000 00008801
xhci_hcd 0000:01:00.0: @cedee410 02000000 00000000 01000000 00008801
xhci_hcd 0000:01:00.0: @cedee420 03000000 00000000 01000000 00008801
xhci_hcd 0000:01:00.0: @cedee430 04000000 00000000 01000000 00008801
xhci_hcd 0000:01:00.0: @cedee440 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee450 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee460 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee470 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee480 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee490 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee4a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee4b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee4c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee4d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee4e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee4f0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee500 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee510 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee520 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee530 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee540 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee550 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee560 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee570 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee580 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee590 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee5a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee5b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee5c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee5d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee5e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee5f0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee600 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee610 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee620 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee630 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee640 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee650 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee660 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee670 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee680 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee690 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee6a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee6b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee6c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee6d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee6e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee6f0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee700 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee710 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee720 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee730 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee740 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee750 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee760 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee770 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee780 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee790 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee7a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee7b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee7c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee7d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee7e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee7f0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: Ring deq = ffc15400 (virt), 0xcedee400 (dma)
xhci_hcd 0000:01:00.0: Ring deq updated 0 times
xhci_hcd 0000:01:00.0: Ring enq = ffc15400 (virt), 0xcedee400 (dma)
xhci_hcd 0000:01:00.0: Ring enq updated 0 times
xhci_hcd 0000:01:00.0: ERST deq = 64'hcedee400
xhci_hcd 0000:01:00.0: Command ring:
xhci_hcd 0000:01:00.0: @cedee000 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee010 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee020 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee030 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee040 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee050 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee060 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee070 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee080 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee090 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee0a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee0b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee0c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee0d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee0e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee0f0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee100 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee110 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee120 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee130 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee140 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee150 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee160 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee170 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee180 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee190 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee1a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee1b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee1c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee1d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee1e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee1f0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee200 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee210 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee220 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee230 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee240 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee250 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee260 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee270 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee280 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee290 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee2a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee2b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee2c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee2d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee2e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee2f0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee300 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee310 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee320 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee330 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee340 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee350 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee360 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee370 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee380 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee390 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee3a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee3b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee3c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee3d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee3e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @cedee3f0 cedee000 00000000 00000000 00001802
xhci_hcd 0000:01:00.0: Ring deq = ffc15000 (virt), 0xcedee000 (dma)
xhci_hcd 0000:01:00.0: Ring deq updated 0 times
xhci_hcd 0000:01:00.0: Ring enq = ffc15000 (virt), 0xcedee000 (dma)
xhci_hcd 0000:01:00.0: Ring enq updated 0 times
xhci_hcd 0000:01:00.0: // xHC command ring deq ptr low bits + flags = @00000000
xhci_hcd 0000:01:00.0: // xHC command ring deq ptr high bits = @00000000






$ lspci -vvv
00:00.0 Class 0604: Device 104c:8888 (rev 01)
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx-
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0, Cache Line Size: 64 bytes
	Region 0: Memory at <ignored> (32-bit, non-prefetchable)
	Region 1: Memory at <ignored> (32-bit, prefetchable)
	Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
	I/O behind bridge: 0000f000-00000fff
	Memory behind bridge: 20000000-200fffff
	Prefetchable memory behind bridge: fff00000-000fffff
	Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR-
	BridgeCtl: Parity+ SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
		PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
	Capabilities: [40] Power Management version 3
		Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
		Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
	Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit+
		Address: 0000000000000000  Data: 0000
	Capabilities: [70] Express (v2) Root Port (Slot-), MSI 00
		DevCap:	MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us
			ExtTag- RBE+ FLReset-
		DevCtl:	Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
			RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+
			MaxPayload 128 bytes, MaxReadReq 512 bytes
		DevSta:	CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
		LnkCap:	Port #0, Speed 5GT/s, Width x2, ASPM L0s, Latency L0 <2us, L1 <64us
			ClockPM- Surprise- LLActRep+ BwNot-
		LnkCtl:	ASPM Disabled; RCB 128 bytes Disabled- Retrain- CommClk-
			ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
		LnkSta:	Speed 5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-
		RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal- PMEIntEna- CRSVisible-
		RootCap: CRSVisible-
		RootSta: PME ReqID 0000, PMEStatus- PMEPending-
		DevCap2: Completion Timeout: Range ABCD, TimeoutDis+, LTR-, OBFF Not Supported ARIFwd-
		DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled ARIFwd-
		LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
			 Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
			 Compliance De-emphasis: -6dB
		LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
			 EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
	Capabilities: [100 v1] Advanced Error Reporting
		UESta:	DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
		UEMsk:	DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
		UESvrt:	DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
		CESta:	RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
		CEMsk:	RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
		AERCap:	First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn-

01:00.0 Class 0c03: Device 1912:0015 (rev 02) (prog-if 30)
	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr+ Stepping- SERR+ FastB2B- DisINTx+
	Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
	Latency: 0, Cache Line Size: 64 bytes
	Interrupt: pin A routed to IRQ 48
	Region 0: Memory at 20000000 (64-bit, non-prefetchable) [size=8K]
	Capabilities: [50] Power Management version 3
		Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA PME(D0+,D1-,D2-,D3hot+,D3cold+)
		Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
	Capabilities: [70] MSI: Enable- Count=1/8 Maskable- 64bit+
		Address: 0000000000000000  Data: 0000
	Capabilities: [90] MSI-X: Enable+ Count=8 Masked-
		Vector table: BAR=0 offset=00001000
		PBA: BAR=0 offset=00001080
	Capabilities: [a0] Express (v2) Endpoint, MSI 00
		DevCap:	MaxPayload 128 bytes, PhantFunc 0, Latency L0s unlimited, L1 unlimited
			ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
		DevCtl:	Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
			RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+
			MaxPayload 128 bytes, MaxReadReq 512 bytes
		DevSta:	CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend-
		LnkCap:	Port #0, Speed 5GT/s, Width x1, ASPM L0s L1, Latency L0 <4us, L1 unlimited
			ClockPM+ Surprise- LLActRep- BwNot-
		LnkCtl:	ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
			ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
		LnkSta:	Speed 5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
		DevCap2: Completion Timeout: Not Supported, TimeoutDis+, LTR+, OBFF Not Supported
		DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
		LnkCtl2: Target Link Speed: 5GT/s, EnterCompliance- SpeedDis-
			 Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
			 Compliance De-emphasis: -6dB
		LnkSta2: Current De-emphasis Level: -6dB, EqualizationComplete-, EqualizationPhase1-
			 EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
	Capabilities: [100 v1] Advanced Error Reporting
		UESta:	DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
		UEMsk:	DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
		UESvrt:	DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
		CESta:	RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
		CEMsk:	RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
		AERCap:	First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
	Capabilities: [150 v1] Latency Tolerance Reporting
		Max snoop latency: 0ns
		Max no snoop latency: 0ns
	Kernel driver in use: xhci_hcd





$ lsusb -t
/:  Bus 03.Port 1: Dev 1, Class=root_hub, Driver=xhci_hcd/4p, 5000M
/:  Bus 02.Port 1: Dev 1, Class=root_hub, Driver=musb-hdrc/1p, 480M
/:  Bus 01.Port 1: Dev 1, Class=root_hub, Driver=musb-hdrc/1p, 480M
    |__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/4p, 480M
        |__ Port 4: Dev 3, If 0, Class=Vendor Specific Class, Driver=asix, 480M

    We go on and try to integrate µPD720202 into our design.
    I enabled debug output of xhci and captured dmesg of initialization in log-file.
    I am not sure if initialization is realy successful but lspci and lsusb show the xhci_hcd device.
    However connecting/disconnecting any USB device is not detected.
    Has anybody captured a successfull use of xhci via PCI ?

  • 0 in reply to Holger Eberhard102906
    Genius 4570 points

    we got some progress. We found a problem with overcurrent detection.

    After we have changed this in hardware - the initialization gets a better state.

    But still no external device is detected, we get the following:

    "Timeout while waiting for a slot  hub 3-0:1.0: couldn't allocate port 1 usb_device"

    2337.teraterm.log 
    dmesg
Linux version 2.6.37+ (heb@heb) (gcc version 4.3.3 (Sourcery G++ Lite 2009q1-203) ) #5 Fri Aug 15 12:39:48 CEST 2014
CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c53c7f
CPU: VIPT nonaliasing data cache, VIPT aliasing instruction cache
Machine: ti8168_dvr
vram size = 20971520 at 0x0
reserved size = 20971520 at 0x0
FB: Reserving 20971520 bytes SDRAM for VRAM
Memory policy: ECC disabled, Data cache writeback
OMAP chip is TI8168 2.0
On node 0 totalpages: 148480
free_area_init_node: node 0, pgdat 8054f85c, node_mem_map 8058a000
  Normal zone: 2680 pages used for memmap
  Normal zone: 0 pages reserved
  Normal zone: 110984 pages, LIFO batch:31
  HighMem zone: 312 pages used for memmap
  HighMem zone: 34504 pages, LIFO batch:7
pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768
pcpu-alloc: [0] 0 
Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 145488
Kernel command line: console=ttyO2,115200n8 init=/linuxrc root=/dev/ram0 rw initrd=0xC2000000,120M ip=192.168.72.200:192.168.72.100:192.168.1.1:255.255.255.0::eth0:off vram=20M notifyk.vpssm3_sva=0xBEE00000 mem=128M mem=472M@0xC0000000 vmalloc=580M
PID hash table entries: 2048 (order: 1, 8192 bytes)
Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
Memory: 128MB 452MB = 580MB total
Memory: 460116k/460116k available, 154284k reserved, 139264K highmem
Virtual kernel memory layout:
    vector  : 0xffff0000 - 0xffff1000   (   4 kB)
    fixmap  : 0xfff00000 - 0xfffe0000   ( 896 kB)
    DMA     : 0xffc00000 - 0xffe00000   (   2 MB)
    vmalloc : 0xd4000000 - 0xf8000000   ( 576 MB)
    lowmem  : 0x80000000 - 0xd3c00000   (1340 MB)
    pkmap   : 0x7fe00000 - 0x80000000   (   2 MB)
    modules : 0x7f000000 - 0x7fe00000   (  14 MB)
      .init : 0x80008000 - 0x8003a000   ( 200 kB)
      .text : 0x8003a000 - 0x80503000   (4900 kB)
      .data : 0x80504000 - 0x80550fc0   ( 308 kB)
SLUB: Genslabs=11, HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
NR_IRQS:407
IRQ: Found an INTC at 0xfa200000 (revision 5.0) with 128 interrupts
Total of 128 interrupts on 1 active controller
GPMC revision 6.0
Trying to install interrupt handler for IRQ400
Trying to install interrupt handler for IRQ401
Trying to install interrupt handler for IRQ402
Trying to install interrupt handler for IRQ403
Trying to install interrupt handler for IRQ404
Trying to install interrupt handler for IRQ405
Trying to install interrupt handler for IRQ406
Trying to install type control for IRQ407
Trying to set irq flags for IRQ407
OMAP clockevent source: GPTIMER1 at 27000000 Hz
Console: colour dummy device 80x30
Calibrating delay loop... 999.42 BogoMIPS (lpj=4997120)
pid_max: default: 32768 minimum: 301
Security Framework initialized
Mount-cache hash table entries: 512
CPU: Testing write buffer coherency: ok
devtmpfs: initialized
omap_voltage_early_init: voltage driver support not added
regulator: core version 0.5
regulator: dummy: 
NET: Registered protocol family 16
omap_voltage_domain_lookup: Voltage driver init not yet happened.Faulting!
omap_voltage_add_dev: VDD specified does not exist!
OMAP GPIO hardware version 0.1
OMAP GPIO hardware version 0.1

 drivers/spi/spi.c spi_init 
omap_mux_init: Add partition: #1: core, flags: 0
3-wired eeprom init done. (H/W ver:ffff)
_omap_mux_get_by_name: Could not find signal i2c2_scl.i2c2_scl
_omap_mux_get_by_name: Could not find signal i2c2_sda.i2c2_sda
registered ti816x_sr device
pm_dbg_init: only OMAP3 supported
registered ti81xx_vpss device
registered ti81xx_vidout device
registered ti81xx on-chip HDMI device
registered ti81xx_fb device
ti81xx_pcie: Invoking PCI BIOS...
ti81xx_pcie: Setting up Host Controller...
ti81xx_pcie: Register base mapped @0xd4020000
ti81xx_pcie: Starting PCI scan...
pci 0000:00:00.0: [104c:8888] type 1 class 0x000604
PCI: bus0: Fast back to back transfers disabled
pci 0000:01:00.0: [1912:0015] type 0 class 0x000c03
pci 0000:01:00.0: reg 10: [mem 0x00000000-0x00001fff 64bit]
pci 0000:01:00.0: PME# supported from D0 D3hot
pci 0000:01:00.0: PME# disabled
PCI: bus1: Fast back to back transfers disabled
pci 0000:00:00.0: BAR 8: assigned [mem 0x20000000-0x200fffff]
pci 0000:01:00.0: BAR 0: assigned [mem 0x20000000-0x20001fff 64bit]
pci 0000:01:00.0: BAR 0: set to [mem 0x20000000-0x20001fff 64bit] (PCI address [0x20000000-0x20001fff])
pci 0000:00:00.0: PCI bridge to [bus 01-01]
pci 0000:00:00.0:   bridge window [io  disabled]
pci 0000:00:00.0:   bridge window [mem 0x20000000-0x200fffff]
pci 0000:00:00.0:   bridge window [mem pref disabled]
PCI: enabling device 0000:00:00.0 (0140 -> 0143)
pci_bus 0000:00: resource 0 [mem 0x20000000-0x2fffffff]
pci_bus 0000:00: resource 1 [io  0x40000000-0x402fffff]
pci_bus 0000:01: resource 1 [mem 0x20000000-0x200fffff]
bio: create slab <bio-0> at 0
vgaarb: loaded
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
USBSS revision 4ea20809
registerd cppi-dma Intr @ IRQ 17
Cppi41 Init Done
omap_i2c omap_i2c.1: bus 1 rev4.0 at 400 kHz
regulator: pmbus_vr: 800 <--> 1050 mV at 1000 mV 
regulator: tps40400 probe done.
omap_i2c omap_i2c.2: bus 2 rev4.0 at 400 kHz
Advanced Linux Sound Architecture Driver Version 1.0.23.
Switching to clocksource gp timer
musb-hdrc: version 6.0, host, debug=0
musb-hdrc musb-hdrc.0: dma type: dma-cppi41
MUSB controller-0 revision 4ea20800
TxFifo Empty intr enabled
musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO Rx, HB-ISO Tx, SoftConn)
musb-hdrc: MHDRC RTL version 2.0 
musb-hdrc: setup fifo_mode 4
musb-hdrc: 28/31 max ep, 16384/16384 memory
musb-hdrc musb-hdrc.0: MUSB HDRC host driver
drivers/usb/core/inode.c: creating file 'devices'
drivers/usb/core/inode.c: creating file '001'
musb-hdrc musb-hdrc.0: new USB bus registered, assigned bus number 1
usb usb1: default language 0x0409
usb usb1: udev 1, busnum 1, minor = 0
usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb1: Product: MUSB HDRC host driver
usb usb1: Manufacturer: Linux 2.6.37+ musb-hcd
usb usb1: SerialNumber: musb-hdrc.0
usb usb1: usb_probe_device
usb usb1: configuration #1 chosen from 1 choice
usb usb1: adding 1-0:1.0 (config #1, interface 0)
hub 1-0:1.0: usb_probe_interface
hub 1-0:1.0: usb_probe_interface - got id
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 1 port detected
hub 1-0:1.0: standalone hub
hub 1-0:1.0: individual port power switching
hub 1-0:1.0: no over-current protection
hub 1-0:1.0: power on to power good time: 10ms
hub 1-0:1.0: local power source is good
hub 1-0:1.0: enabling power on all ports
drivers/usb/core/inode.c: creating file '001'
musb-hdrc musb-hdrc.0: USB Host mode controller at d401e000 using DMA, IRQ 18
Registered /proc/driver/musb_hdrc.0
musb-hdrc musb-hdrc.1: dma type: dma-cppi41
MUSB controller-1 revision 4ea20800
TxFifo Empty intr enabled
musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO Rx, HB-ISO Tx, SoftConn)
musb-hdrc: MHDRC RTL version 2.0 
musb-hdrc: setup fifo_mode 4
musb-hdrc: 28/31 max ep, 16384/16384 memory
musb-hdrc musb-hdrc.1: MUSB HDRC host driver
drivers/usb/core/inode.c: creating file '002'
musb-hdrc musb-hdrc.1: new USB bus registered, assigned bus number 2
usb usb2: default language 0x0409
usb usb2: udev 1, busnum 2, minor = 128
usb usb2: New USB device found, idVendor=1d6b, idProduct=0002
usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb2: Product: MUSB HDRC host driver
usb usb2: Manufacturer: Linux 2.6.37+ musb-hcd
usb usb2: SerialNumber: musb-hdrc.1
usb usb2: usb_probe_device
usb usb2: configuration #1 chosen from 1 choice
usb usb2: adding 2-0:1.0 (config #1, interface 0)
hub 2-0:1.0: usb_probe_interface
hub 2-0:1.0: usb_probe_interface - got id
hub 2-0:1.0: USB hub found
hub 2-0:1.0: 1 port detected
hub 2-0:1.0: standalone hub
hub 2-0:1.0: individual port power switching
hub 2-0:1.0: no over-current protection
hub 2-0:1.0: power on to power good time: 10ms
hub 2-0:1.0: local power source is good
hub 2-0:1.0: enabling power on all ports
drivers/usb/core/inode.c: creating file '001'
musb-hdrc musb-hdrc.1: USB Host mode controller at d4026800 using DMA, IRQ 19
Registered /proc/driver/musb_hdrc.1
NET: Registered protocol family 2
IP route cache hash table entries: 4096 (order: 2, 16384 bytes)
TCP established hash table entries: 16384 (order: 5, 131072 bytes)
TCP bind hash table entries: 16384 (order: 4, 65536 bytes)
TCP: Hash tables configured (established 16384 bind 16384)
TCP reno registered
UDP hash table entries: 256 (order: 0, 4096 bytes)
UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
NET: Registered protocol family 1
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
PCI: CLS 64 bytes, default 64
Trying to unpack rootfs image as initramfs...
rootfs image is not initramfs (no cpio magic); looks like an initrd
hub 1-0:1.0: state 7 ports 1 chg 0000 evt 0000
hub 2-0:1.0: state 7 ports 1 chg 0000 evt 0000
hub 1-0:1.0: state 7 ports 1 chg 0000 evt 0002
hub 1-0:1.0: port 1, status 0101, change 0001, 12 Mb/s
hub 1-0:1.0: debounce: port 1: total 100ms stable 100ms status 0x101
Freeing initrd memory: 122880K
NetWinder Floating Point Emulator V0.97 (double precision)
PMU: registered new PMU device of type 0
omap-iommu omap-iommu.0: ducati registered
omap-iommu omap-iommu.1: sys registered
usb 1-1: new high speed USB device using musb-hdrc and address 2
highmem bounce pool size: 64 pages
JFFS2 version 2.2. (NAND) © 2001-2006 Red Hat, Inc.
msgmni has been set to 866
io scheduler noop registered
io scheduler deadline registered
io scheduler cfq registered (default)
Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
omap_uart.0: ttyO0 at MMIO 0x48020000 (irq = 72) is a OMAP UART0
omap_uart.1: ttyO1 at MMIO 0x48022000 (irq = 73) is a OMAP UART1
omap_uart.2: ttyO2 at MMIO 0x48024000 (irq = 74) is a OMAP UART2
console [ttyO2] enabled
brd: module loaded
loop: module loaded
omap2-nand driver initializing
ONFI flash detected
NAND device: Maf ID: 0x2c, Chip ID: 0xb3 (Micron, )
 erasesize: 0x20000, writesize: 2048, oobsize: 64
Creating 11 MTD partitions on "omap2-nand.0":
0x000000000000-0x000000240000 : "U-Boot"
0x000000240000-0x000000280000 : "U-Boot Env"
0x000000280000-0x000000580000 : "Boot Splash"
0x000000580000-0x0000009c0000 : "Kernel"
0x0000009c0000-0x0000086c0000 : "File System"
0x0000086c0000-0x00000cee0000 : "Firmware Upload"
0x00000cee0000-0x00000cf20000 : "BOP Keys"
0x00000cf20000-0x00000cf60000 : "BOP Config"
0x00000cf60000-0x00000cfa0000 : "Web update notify"
0x00000cfa0000-0x00000d2c0000 : "Update header"
0x00000d2c0000-0x000040000000 : "Reserved"
usb 1-1: udev 2, busnum 1, minor = 1
usb 1-1: New USB device found, idVendor=0409, idProduct=005a
usb 1-1: New USB device strings: Mfr=0, Product=0, SerialNumber=0
usb 1-1: usb_probe_device
usb 1-1: configuration #1 chosen from 1 choice
usb 1-1: adding 1-1:1.0 (config #1, interface 0)
hub 1-1:1.0: usb_probe_interface
hub 1-1:1.0: usb_probe_interface - got id
hub 1-1:1.0: USB hub found
hub 1-1:1.0: 4 ports detected
hub 1-1:1.0: compound device; port removable status: RFFF
hub 1-1:1.0: individual port power switching
hub 1-1:1.0: individual port over-current protection
hub 1-1:1.0: Single TT
hub 1-1:1.0: TT requires at most 16 FS bit times (1332 ns)
hub 1-1:1.0: power on to power good time: 100ms
hub 1-1:1.0: local power source is good
hub 1-1:1.0: enabling power on all ports
drivers/usb/core/inode.c: creating file '002'
hub 1-0:1.0: state 7 ports 1 chg 0000 evt 0002
hub 1-0:1.0: port 1 enable change, status 00000503
davinci_mdio davinci_mdio.0: davinci mdio revision 1.6
davinci_mdio davinci_mdio.0: detected phy mask fffffffd
davinci_mdio.0: probed
davinci_mdio davinci_mdio.0: phy[1]: device 0:01, driver unknown
usbcore: registered new interface driver asix
usbcore: registered new interface driver cdc_ether
usbcore: registered new interface driver dm9601
Initializing USB Mass Storage driver...
usbcore: registered new interface driver usb-storage
USB Mass Storage support registered.
usbcore: registered new interface driver usbserial
USB Serial support registered for generic
usbcore: registered new interface driver usbserial_generic
usbserial: USB Serial Driver core
USB Serial support registered for FTDI USB Serial Device
usbcore: registered new interface driver ftdi_sio
ftdi_sio: v1.6.0:USB FTDI Serial Converters Driver
USB Serial support registered for pl2303
usbcore: registered new interface driver pl2303
pl2303: Prolific PL2303 USB to serial adaptor driver
mice: PS/2 mouse device common for all mice
hub 1-1:1.0: port 4: status 0101 change 0001
rtc-ds1307 1-0068: rtc core: registered ds1337 as rtc0
omap_rtc omap_rtc: rtc core: registered omap_rtc as rtc1
i2c /dev entries driver
Linux video capture interface: v2.00
usbcore: registered new interface driver uvcvideo
USB Video Class driver (v1.0.0)
OMAP Watchdog Timer Rev 0x00: initial timeout 60 sec
usbcore: registered new interface driver usbhid
usbhid: USB HID core driver
notify_init : notify drivercreated  for  remote proc id 2 at physical Address 0xbee00000
usbcore: registered new interface driver snd-usb-audio
Registered tvp5158 audio codec
asoc: tvp5158-hifi <-> davinci-mcasp.0 mapping ok
asoc: tlv320aic3x-hifi <-> davinci-mcasp.2 mapping ok
asoc: HDMI-DAI-CODEC <-> hdmi-dai mapping ok
ALSA device list:
  #0: TI81XX DVR
TCP cubic registered
NET: Registered protocol family 17
VFP support v0.3: implementor 41 architecture 3 part 30 variant c rev 3
omap_voltage_late_init: Voltage driver support not added
Power Management for TI81XX.
smartreflex-ti816x: ti816x_sr_probe done!
hub 1-1:1.0: state 7 ports 4 chg 0010 evt 0000
hub 1-1:1.0: port 4, status 0101, change 0000, 12 Mb/s
rtc-ds1307 1-0068: setting system clock to 2000-02-02 06:49:14 UTC (949474154)
usb 1-1.4: new high speed USB device using musb-hdrc and address 3
hub 1-1:1.0: port 4 not reset yet, waiting 10ms
usb 1-1.4: default language 0x0409
usb 1-1.4: udev 3, busnum 1, minor = 2
usb 1-1.4: New USB device found, idVendor=0b95, idProduct=772a
usb 1-1.4: New USB device strings: Mfr=1, Product=2, SerialNumber=3
usb 1-1.4: Product: AX88772 
usb 1-1.4: Manufacturer: ASIX Elec. Corp.
usb 1-1.4: SerialNumber: 000001
usb 1-1.4: usb_probe_device
usb 1-1.4: configuration #1 chosen from 1 choice
usb 1-1.4: adding 1-1.4:1.0 (config #1, interface 0)
asix 1-1.4:1.0: usb_probe_interface
asix 1-1.4:1.0: usb_probe_interface - got id
davinci_mdio davinci_mdio.0: resetting idled controller
net eth0: attached PHY driver [Generic PHY] (mii_bus:phy_addr=0:01, id=2430d91)
asix 1-1.4:1.0: eth2: register 'asix' at usb-musb-hdrc.0-1.4, ASIX AX88772 USB 2.0 Ethernet, 00:00:00:00:00:00
drivers/usb/core/inode.c: creating file '003'
IP-Config: Gateway not on directly connected network.
RAMDISK: gzip image found at block 0
PHY: 0:01 - Link is Up - 100/Full
VFS: Mounted root (ext2 filesystem) on device 1:0.
devtmpfs: mounted
Freeing init memory: 200K
libata version 3.00 loaded.
ahci: Unknown symbol ahci_ops (err 0)
ahci: Unknown symbol ahci_start_engine (err 0)
ahci: Unknown symbol ahci_interrupt (err 0)
ahci: Unknown symbol ahci_check_ready (err 0)
ahci: Unknown symbol ahci_kick_engine (err 0)
ahci: Unknown symbol ahci_set_em_messages (err 0)
ahci: Unknown symbol ahci_init_controller (err 0)
ahci: Unknown symbol ahci_shost_attrs (err 0)
ahci: Unknown symbol ahci_reset_controller (err 0)
ahci: Unknown symbol ahci_print_info (err 0)
ahci: Unknown symbol ahci_do_softreset (err 0)
ahci: Unknown symbol ahci_stop_engine (err 0)
ahci: Unknown symbol ahci_reset_em (err 0)
ahci: Unknown symbol ahci_sdev_attrs (err 0)
ahci: Unknown symbol ahci_save_initial_config (err 0)
ahci: Unknown symbol ahci_ignore_sss (err 0)
ahci ahci.0: forcing PORTS_IMPL to 0x3
ahci ahci.0: AHCI 0001.0100 32 slots 2 ports 3 Gbps 0x3 impl platform mode
ahci ahci.0: flags: ncq sntf pm led clo only pmp pio slum part ccc 
scsi0 : ahci_platform
scsi1 : ahci_platform
ata1: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a150fff] port 0x100 irq 16
ata2: SATA max UDMA/133 mmio [mem 0x4a140000-0x4a150fff] port 0x180 irq 16
ata1: SATA link down (SStatus 0 SControl 300)
ata2: SATA link down (SStatus 0 SControl 300)
SysLink version : 2.10.02.17
SysLink module created on Date:Aug  7 2014 Time:09:47:39
Trace enabled
Trace SetFailureReason enabled
DMA: Module install successful, device major num = 251 
DRV: Module install successful
DRV: Module built on Aug 11 2014 10:14:05 
[module] vpss probe done.
[module] ti81xxfb probe done.
eth2: link up, 100Mbps, full-duplex, lpa 0x45E1
eth2: link up, 100Mbps, full-duplex, lpa 0x45E1
PCI: enabling device 0000:01:00.0 (0140 -> 0142)
xhci_hcd 0000:01:00.0: xHCI Host Controller
drivers/usb/core/inode.c: creating file '003'
xhci_hcd 0000:01:00.0: new USB bus registered, assigned bus number 3
[XHCI FW Downloder] XHCI_FWDownLoadCheck
[XHCI FW Downloder] VendorID=1912, DeviceID=0015, Revision=0002
[XHCI FW Downloder] Device is 720201/202
[XHCI FW Downloder] --Revision 2
[XHCI FW Downloder] Firmware load OK
[XHCI FW Downloder] XHCI_FWDownLoad
[XHCI FW Downloder] PCICNF0F4 register = 00000000)
[XHCI FW Downloder] Result=00000000
xhci_hcd 0000:01:00.0: xHCI capability registers at d8f64000:
xhci_hcd 0000:01:00.0: CAPLENGTH AND HCIVERSION 0x1000020:
xhci_hcd 0000:01:00.0: CAPLENGTH: 0x20
xhci_hcd 0000:01:00.0: HCIVERSION: 0x100
xhci_hcd 0000:01:00.0: HCSPARAMS 1: 0x4000820
xhci_hcd 0000:01:00.0:   Max device slots: 32
xhci_hcd 0000:01:00.0:   Max interrupters: 8
xhci_hcd 0000:01:00.0:   Max ports: 4
xhci_hcd 0000:01:00.0: HCSPARAMS 2: 0x24000011
xhci_hcd 0000:01:00.0:   Isoc scheduling threshold: 1
xhci_hcd 0000:01:00.0:   Maximum allowed segments in event ring: 1
xhci_hcd 0000:01:00.0: HCSPARAMS 3 0x0:
xhci_hcd 0000:01:00.0:   Worst case U1 device exit latency: 0
xhci_hcd 0000:01:00.0:   Worst case U2 device exit latency: 0
xhci_hcd 0000:01:00.0: HCC PARAMS 0x14051cf:
xhci_hcd 0000:01:00.0:   HC generates 64 bit addresses
xhci_hcd 0000:01:00.0:   FIXME: more HCCPARAMS debugging
xhci_hcd 0000:01:00.0: RTSOFF 0x600:
xhci_hcd 0000:01:00.0: xHCI operational registers at d8f64020:
xhci_hcd 0000:01:00.0: USBCMD 0x0:
xhci_hcd 0000:01:00.0:   HC is being stopped
xhci_hcd 0000:01:00.0:   HC has finished hard reset
xhci_hcd 0000:01:00.0:   Event Interrupts disabled
xhci_hcd 0000:01:00.0:   Host System Error Interrupts disabled
xhci_hcd 0000:01:00.0:   HC has finished light reset
xhci_hcd 0000:01:00.0: USBSTS 0x1:
xhci_hcd 0000:01:00.0:   Event ring is empty
xhci_hcd 0000:01:00.0:   No Host System Error
xhci_hcd 0000:01:00.0:   HC is halted
xhci_hcd 0000:01:00.0: d8f64420 port status reg = 0x80
xhci_hcd 0000:01:00.0: d8f64424 port power reg = 0x0
xhci_hcd 0000:01:00.0: d8f64428 port link reg = 0x0
xhci_hcd 0000:01:00.0: d8f6442c port reserved reg = 0x0
xhci_hcd 0000:01:00.0: d8f64430 port status reg = 0x80
xhci_hcd 0000:01:00.0: d8f64434 port power reg = 0x0
xhci_hcd 0000:01:00.0: d8f64438 port link reg = 0x0
xhci_hcd 0000:01:00.0: d8f6443c port reserved reg = 0x0
xhci_hcd 0000:01:00.0: d8f64440 port status reg = 0x80
xhci_hcd 0000:01:00.0: d8f64444 port power reg = 0x0
xhci_hcd 0000:01:00.0: d8f64448 port link reg = 0x0
xhci_hcd 0000:01:00.0: d8f6444c port reserved reg = 0x0
xhci_hcd 0000:01:00.0: d8f64450 port status reg = 0x80
xhci_hcd 0000:01:00.0: d8f64454 port power reg = 0x0
xhci_hcd 0000:01:00.0: d8f64458 port link reg = 0x0
xhci_hcd 0000:01:00.0: d8f6445c port reserved reg = 0x0
xhci_hcd 0000:01:00.0: // Halt the HC
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hd8f64020, 32'h0, 4'hf);
xhci_hcd 0000:01:00.0: handshake done after 2000 microseconds.
xhci_hcd 0000:01:00.0: Resetting HCD
xhci_hcd 0000:01:00.0: // Reset the HC
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hd8f64020, 32'h2, 4'hf);
xhci_hcd 0000:01:00.0: handshake done after 9998003 microseconds.
xhci_hcd 0000:01:00.0: Wait for controller to be ready for doorbell rings
xhci_hcd 0000:01:00.0: handshake done after 1000000 microseconds.
xhci_hcd 0000:01:00.0: Reset complete
xhci_hcd 0000:01:00.0: Enabling 64-bit DMA addresses.
xhci_hcd 0000:01:00.0: Calling HCD init
xhci_hcd 0000:01:00.0: xhci_init
xhci_hcd 0000:01:00.0: xHCI doesn't need link TRB QUIRK
xhci_hcd 0000:01:00.0: Supported page size register = 0x1
xhci_hcd 0000:01:00.0: Supported page size of 4K
xhci_hcd 0000:01:00.0: HCD page size set to 4K
xhci_hcd 0000:01:00.0: // xHC can handle at most 32 device slots.
xhci_hcd 0000:01:00.0: // Setting Max device slots reg = 0x20.
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hd8f64058, 32'h20, 4'hf);
xhci_hcd 0000:01:00.0: // Device context base array address = 0xc2c4a000 (DMA), ffc14000 (virt)
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 64'hd8f64050, 64'hc2c4a000, 4'hf);
xhci_hcd 0000:01:00.0: Allocating ring at c3ae9dc0
xhci_hcd 0000:01:00.0: Allocating priv segment structure at c3ae9e00
xhci_hcd 0000:01:00.0: // Allocating segment at ffc15000 (virtual) 0xc2c49000 (DMA)
xhci_hcd 0000:01:00.0: Linking segment 0xc2c49000 to segment 0xc2c49000 (DMA)
xhci_hcd 0000:01:00.0: Wrote link toggle flag to segment c3ae9e00 (virtual), 0xc2c49000 (DMA)
xhci_hcd 0000:01:00.0: Allocated command ring at c3ae9dc0
xhci_hcd 0000:01:00.0: First segment DMA is 0xc2c49000
xhci_hcd 0000:01:00.0: // Setting command ring address to 0x20
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 64'hd8f64038, 64'hc2c49001, 4'hf);
xhci_hcd 0000:01:00.0: // xHC command ring deq ptr low bits + flags = @00000000
xhci_hcd 0000:01:00.0: // xHC command ring deq ptr high bits = @00000000
xhci_hcd 0000:01:00.0: // Doorbell array is located at offset 0x800 from cap regs base addr
xhci_hcd 0000:01:00.0: // xHCI capability registers at d8f64000:
xhci_hcd 0000:01:00.0: // @d8f64000 = 0x1000020 (CAPLENGTH AND HCIVERSION)
xhci_hcd 0000:01:00.0: //   CAPLENGTH: 0x20
xhci_hcd 0000:01:00.0: // xHCI operational registers at d8f64020:
xhci_hcd 0000:01:00.0: // @d8f64018 = 0x600 RTSOFF
xhci_hcd 0000:01:00.0: // xHCI runtime registers at d8f64600:
xhci_hcd 0000:01:00.0: // @d8f64014 = 0x800 DBOFF
xhci_hcd 0000:01:00.0: // Doorbell array at d8f64800:
xhci_hcd 0000:01:00.0: xHCI runtime registers at d8f64600:
xhci_hcd 0000:01:00.0:   d8f64600: Microframe index = 0x0
xhci_hcd 0000:01:00.0: // Allocating event ring
xhci_hcd 0000:01:00.0: Allocating ring at c3ae9ec0
xhci_hcd 0000:01:00.0: Allocating priv segment structure at c3ae9f00
xhci_hcd 0000:01:00.0: // Allocating segment at ffc15400 (virtual) 0xc2c49400 (DMA)
xhci_hcd 0000:01:00.0: Linking segment 0xc2c49400 to segment 0xc2c49400 (DMA)
xhci_hcd 0000:01:00.0: TRB math tests passed.
xhci_hcd 0000:01:00.0: // Allocated event ring segment table at 0xc2c48000
xhci_hcd 0000:01:00.0: Set ERST to 0; private num segs = 1, virt addr = ffc16000, dma addr = 0xc2c48000
xhci_hcd 0000:01:00.0: // Write ERST size = 1 to ir_set 0 (some bits preserved)
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hd8f64628, 32'h1, 4'hf);
xhci_hcd 0000:01:00.0: // Set ERST entries to point to event ring.
xhci_hcd 0000:01:00.0: // Set ERST base address for ir_set 0 = 0xc2c48000
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 64'hd8f64630, 64'hc2c48000, 4'hf);
xhci_hcd 0000:01:00.0: // Write event ring dequeue pointer, preserving EHB bit
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 64'hd8f64638, 64'hc2c49400, 4'hf);
xhci_hcd 0000:01:00.0: Wrote ERST address to ir_set 0.
xhci_hcd 0000:01:00.0: Allocating 4 scratchpad buffers
xhci_hcd 0000:01:00.0: Ext Cap d8f64510, port offset = 1, count = 2, revision = 0x3
xhci_hcd 0000:01:00.0: Ext Cap d8f64524, port offset = 3, count = 2, revision = 0x2
xhci_hcd 0000:01:00.0: Found 2 USB 2.0 ports and 2 USB 3.0 ports.
xhci_hcd 0000:01:00.0: USB 2.0 port at index 2, addr = d8f64440
xhci_hcd 0000:01:00.0: USB 2.0 port at index 3, addr = d8f64450
xhci_hcd 0000:01:00.0: USB 3.0 port at index 0, addr = d8f64420
xhci_hcd 0000:01:00.0: USB 3.0 port at index 1, addr = d8f64430
xhci_hcd 0000:01:00.0: Finished xhci_init
xhci_hcd 0000:01:00.0: Called HCD init
xhci_hcd 0000:01:00.0: Got SBRN 48
xhci_hcd 0000:01:00.0: MWI active
xhci_hcd 0000:01:00.0: Finished xhci_pci_reinit
xhci_hcd 0000:01:00.0: supports USB remote wakeup
xhci_hcd 0000:01:00.0: irq 48, io mem 0x20000000
xhci_hcd 0000:01:00.0: xhci_run
xhci_hcd 0000:01:00.0: Setting event ring polling timer
xhci_hcd 0000:01:00.0: Command ring memory map follows:
xhci_hcd 0000:01:00.0: @c2c49000 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49010 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49020 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49030 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49040 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49050 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49060 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49070 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49080 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49090 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c490a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c490b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c490c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c490d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c490e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c490f0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49100 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49110 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49120 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49130 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49140 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49150 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49160 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49170 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49180 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49190 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c491a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c491b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c491c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c491d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c491e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c491f0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49200 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49210 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49220 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49230 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49240 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49250 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49260 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49270 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49280 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49290 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c492a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c492b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c492c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c492d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c492e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c492f0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49300 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49310 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49320 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49330 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49340 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49350 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49360 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49370 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49380 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49390 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c493a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c493b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c493c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c493d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c493e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c493f0 c2c49000 00000000 00000000 00001802
xhci_hcd 0000:01:00.0:   Ring has not been updated
xhci_hcd 0000:01:00.0: Ring deq = ffc15000 (virt), 0xc2c49000 (dma)
xhci_hcd 0000:01:00.0: Ring deq updated 0 times
xhci_hcd 0000:01:00.0: Ring enq = ffc15000 (virt), 0xc2c49000 (dma)
xhci_hcd 0000:01:00.0: Ring enq updated 0 times
xhci_hcd 0000:01:00.0: // xHC command ring deq ptr low bits + flags = @00000000
xhci_hcd 0000:01:00.0: // xHC command ring deq ptr high bits = @00000000
xhci_hcd 0000:01:00.0: ERST memory map follows:
xhci_hcd 0000:01:00.0: @c2c48000 c2c49400 00000000 00000040 00000000
xhci_hcd 0000:01:00.0: Event ring:
xhci_hcd 0000:01:00.0: @c2c49400 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49410 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49420 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49430 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49440 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49450 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49460 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49470 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49480 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49490 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c494a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c494b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c494c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c494d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c494e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c494f0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49500 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49510 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49520 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49530 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49540 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49550 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49560 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49570 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49580 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49590 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c495a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c495b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c495c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c495d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c495e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c495f0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49600 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49610 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49620 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49630 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49640 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49650 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49660 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49670 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49680 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49690 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c496a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c496b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c496c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c496d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c496e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c496f0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49700 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49710 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49720 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49730 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49740 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49750 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49760 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49770 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49780 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49790 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c497a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c497b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c497c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c497d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c497e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c497f0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0:   Ring has not been updated
xhci_hcd 0000:01:00.0: Ring deq = ffc15400 (virt), 0xc2c49400 (dma)
xhci_hcd 0000:01:00.0: Ring deq updated 0 times
xhci_hcd 0000:01:00.0: Ring enq = ffc15400 (virt), 0xc2c49400 (dma)
xhci_hcd 0000:01:00.0: Ring enq updated 0 times
xhci_hcd 0000:01:00.0: ERST deq = 64'hc2c49400
xhci_hcd 0000:01:00.0: // Set the interrupt modulation register
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hd8f64624, 32'ha0, 4'hf);
xhci_hcd 0000:01:00.0: // Enable interrupts, cmd = 0x4.
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hd8f64020, 32'h4, 4'hf);
xhci_hcd 0000:01:00.0: // Enabling event ring interrupter d8f64620 by writing 0x2 to irq_pending
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hd8f64620, 32'h2, 4'hf);
xhci_hcd 0000:01:00.0:   d8f64620: ir_set[0]
xhci_hcd 0000:01:00.0:   d8f64620: ir_set.pending = 0x2
xhci_hcd 0000:01:00.0:   d8f64624: ir_set.control = 0xa0
xhci_hcd 0000:01:00.0:   d8f64628: ir_set.erst_size = 0x1
xhci_hcd 0000:01:00.0:   d8f64630: ir_set.erst_base = @c2c48000
xhci_hcd 0000:01:00.0:   d8f64638: ir_set.erst_dequeue = @c2c49400
xhci_hcd 0000:01:00.0: // Turn on HC, cmd = 0x5.
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hd8f64020, 32'h5, 4'hf);
xhci_hcd 0000:01:00.0: handshake done after 1989 microseconds.
xhci_hcd 0000:01:00.0: Finished xhci_run
usb usb3: No SuperSpeed endpoint companion for config 1  interface 0 altsetting 0 ep 129: using minimum values
usb usb3: default language 0x0409
usb usb3: udev 1, busnum 3, minor = 256
usb usb3: New USB device found, idVendor=1d6b, idProduct=0003
usb usb3: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb3: Product: xHCI Host Controller
usb usb3: Manufacturer: Linux 2.6.37+ xhci_hcd
usb usb3: SerialNumber: 0000:01:00.0
usb usb3: usb_probe_device
usb usb3: configuration #1 chosen from 1 choice
xHCI xhci_add_endpoint called for root hub
xHCI xhci_check_bandwidth called for root hub
usb usb3: adding 3-0:1.0 (config #1, interface 0)
hub 3-0:1.0: usb_probe_interface
hub 3-0:1.0: usb_probe_interface - got id
hub 3-0:1.0: USB hub found
hub 3-0:1.0: 4 ports detected
hub 3-0:1.0: standalone hub
hub 3-0:1.0: individual port power switching
hub 3-0:1.0: individual port over-current protection
hub 3-0:1.0: TT requires at most 8 FS bit times (666 ns)
hub 3-0:1.0: power on to power good time: 20ms
hub 3-0:1.0: local power source is good
hub 3-0:1.0: enabling power on all ports
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hd8f64420, 32'h2a0, 4'hf);
xhci_hcd 0000:01:00.0: set port power, actual port 0 status  = 0x2a0
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hd8f64430, 32'h2a0, 4'hf);
xhci_hcd 0000:01:00.0: set port power, actual port 1 status  = 0x2a0
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hd8f64440, 32'h2a0, 4'hf);
xhci_hcd 0000:01:00.0: set port power, actual port 2 status  = 0x202a0
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hd8f64450, 32'h2a0, 4'hf);
xhci_hcd 0000:01:00.0: set port power, actual port 3 status  = 0x2a0
drivers/usb/core/inode.c: creating file '001'
xhci_hcd 0000:01:00.0: get port status, actual port 0 status  = 0x21203
xhci_hcd 0000:01:00.0: Get port status returned 0x18103
hub 3-0:1.0: port 1: status 8103 change 0001
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hd8f64420, 32'h21201, 4'hf);
xhci_hcd 0000:01:00.0: clear port connect change, actual port 0 status  = 0x1203
xhci_hcd 0000:01:00.0: get port status, actual port 1 status  = 0x2a0
xhci_hcd 0000:01:00.0: Get port status returned 0x100
xhci_hcd 0000:01:00.0: get port status, actual port 2 status  = 0x202a0
xhci_hcd 0000:01:00.0: Get port status returned 0x10100
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hd8f64440, 32'h202a0, 4'hf);
xhci_hcd 0000:01:00.0: clear port connect change, actual port 2 status  = 0x2a0
xhci_hcd 0000:01:00.0: get port status, actual port 3 status  = 0x2a0
xhci_hcd 0000:01:00.0: Get port status returned 0x100
hub 3-0:1.0: state 7 ports 4 chg 0002 evt 0000
xhci_hcd 0000:01:00.0: get port status, actual port 0 status  = 0x1203
xhci_hcd 0000:01:00.0: Get port status returned 0x8103
hub 3-0:1.0: port 1, status 8103, change 0000, 5.0 Gb/s
xhci_hcd 0000:01:00.0: Endpoint state = 0x1
xhci_hcd 0000:01:00.0: Command ring enq = 0xc2c49010 (DMA)
xhci_hcd 0000:01:00.0: // Ding dong!
xhci_hcd 0000:01:00.0: `MEM_WRITE_DWORD(3'b000, 32'hd8f64800, 32'h0, 4'hf);

!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
xhci_hcd 0000:01:00.0: Timeout while waiting for a slot
hub 3-0:1.0: couldn't allocate port 1 usb_device
!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!

xhci_hcd 0000:01:00.0: Ignoring request to disable SuperSpeed port.
xhci_hcd 0000:01:00.0: Poll event ring: 4294952864
xhci_hcd 0000:01:00.0: op reg status = 0x18
xhci_hcd 0000:01:00.0: ir_set 0 pending = 0x3
xhci_hcd 0000:01:00.0: No-op commands handled = 0
xhci_hcd 0000:01:00.0: HC error bitmask = 0x0
xhci_hcd 0000:01:00.0: Event ring:
xhci_hcd 0000:01:00.0: @c2c49400 03000000 00000000 01000000 00008801
xhci_hcd 0000:01:00.0: @c2c49410 01000000 00000000 01000000 00008801
xhci_hcd 0000:01:00.0: @c2c49420 c2c49000 00000000 01000000 01008401
xhci_hcd 0000:01:00.0: @c2c49430 01000000 00000000 01000000 00008801
xhci_hcd 0000:01:00.0: @c2c49440 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49450 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49460 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49470 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49480 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49490 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c494a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c494b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c494c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c494d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c494e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c494f0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49500 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49510 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49520 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49530 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49540 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49550 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49560 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49570 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49580 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49590 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c495a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c495b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c495c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c495d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c495e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c495f0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49600 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49610 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49620 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49630 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49640 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49650 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49660 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49670 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49680 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49690 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c496a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c496b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c496c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c496d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c496e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c496f0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49700 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49710 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49720 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49730 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49740 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49750 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49760 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49770 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49780 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49790 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c497a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c497b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c497c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c497d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c497e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c497f0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: Ring deq = ffc15400 (virt), 0xc2c49400 (dma)
xhci_hcd 0000:01:00.0: Ring deq updated 0 times
xhci_hcd 0000:01:00.0: Ring enq = ffc15400 (virt), 0xc2c49400 (dma)
xhci_hcd 0000:01:00.0: Ring enq updated 0 times
xhci_hcd 0000:01:00.0: ERST deq = 64'hc2c49400
xhci_hcd 0000:01:00.0: Command ring:
xhci_hcd 0000:01:00.0: @c2c49000 00000000 00000000 00000000 00002401
xhci_hcd 0000:01:00.0: @c2c49010 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49020 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49030 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49040 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49050 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49060 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49070 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49080 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49090 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c490a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c490b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c490c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c490d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c490e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c490f0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49100 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49110 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49120 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49130 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49140 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49150 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49160 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49170 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49180 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49190 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c491a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c491b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c491c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c491d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c491e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c491f0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49200 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49210 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49220 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49230 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49240 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49250 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49260 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49270 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49280 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49290 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c492a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c492b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c492c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c492d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c492e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c492f0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49300 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49310 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49320 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49330 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49340 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49350 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49360 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49370 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49380 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49390 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c493a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c493b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c493c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c493d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c493e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c493f0 c2c49000 00000000 00000000 00001802
xhci_hcd 0000:01:00.0: Ring deq = ffc15000 (virt), 0xc2c49000 (dma)
xhci_hcd 0000:01:00.0: Ring deq updated 0 times
xhci_hcd 0000:01:00.0: Ring enq = ffc15010 (virt), 0xc2c49010 (dma)
xhci_hcd 0000:01:00.0: Ring enq updated 1 times
xhci_hcd 0000:01:00.0: // xHC command ring deq ptr low bits + flags = @00000008
xhci_hcd 0000:01:00.0: // xHC command ring deq ptr high bits = @00000000
xhci_hcd 0000:01:00.0: Poll event ring: 4294958880
xhci_hcd 0000:01:00.0: op reg status = 0x18
xhci_hcd 0000:01:00.0: ir_set 0 pending = 0x3
xhci_hcd 0000:01:00.0: No-op commands handled = 0
xhci_hcd 0000:01:00.0: HC error bitmask = 0x0
xhci_hcd 0000:01:00.0: Event ring:
xhci_hcd 0000:01:00.0: @c2c49400 03000000 00000000 01000000 00008801
xhci_hcd 0000:01:00.0: @c2c49410 01000000 00000000 01000000 00008801
xhci_hcd 0000:01:00.0: @c2c49420 c2c49000 00000000 01000000 01008401
xhci_hcd 0000:01:00.0: @c2c49430 01000000 00000000 01000000 00008801
xhci_hcd 0000:01:00.0: @c2c49440 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49450 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49460 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49470 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49480 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49490 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c494a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c494b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c494c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c494d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c494e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c494f0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49500 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49510 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49520 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49530 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49540 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49550 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49560 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49570 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49580 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49590 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c495a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c495b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c495c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c495d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c495e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c495f0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49600 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49610 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49620 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49630 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49640 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49650 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49660 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49670 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49680 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49690 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c496a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c496b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c496c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c496d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c496e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c496f0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49700 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49710 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49720 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49730 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49740 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49750 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49760 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49770 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49780 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49790 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c497a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c497b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c497c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c497d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c497e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c497f0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: Ring deq = ffc15400 (virt), 0xc2c49400 (dma)
xhci_hcd 0000:01:00.0: Ring deq updated 0 times
xhci_hcd 0000:01:00.0: Ring enq = ffc15400 (virt), 0xc2c49400 (dma)
xhci_hcd 0000:01:00.0: Ring enq updated 0 times
xhci_hcd 0000:01:00.0: ERST deq = 64'hc2c49400
xhci_hcd 0000:01:00.0: Command ring:
xhci_hcd 0000:01:00.0: @c2c49000 00000000 00000000 00000000 00002401
xhci_hcd 0000:01:00.0: @c2c49010 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49020 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49030 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49040 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49050 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49060 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49070 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49080 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49090 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c490a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c490b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c490c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c490d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c490e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c490f0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49100 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49110 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49120 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49130 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49140 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49150 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49160 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49170 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49180 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49190 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c491a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c491b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c491c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c491d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c491e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c491f0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49200 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49210 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49220 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49230 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49240 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49250 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49260 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49270 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49280 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49290 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c492a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c492b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c492c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c492d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c492e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c492f0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49300 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49310 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49320 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49330 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49340 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49350 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49360 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49370 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49380 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c49390 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c493a0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c493b0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c493c0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c493d0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c493e0 00000000 00000000 00000000 00000000
xhci_hcd 0000:01:00.0: @c2c493f0 c2c49000 00000000 00000000 00001802
xhci_hcd 0000:01:00.0: Ring deq = ffc15000 (virt), 0xc2c49000 (dma)
xhci_hcd 0000:01:00.0: Ring deq updated 0 times
xhci_hcd 0000:01:00.0: Ring enq = ffc15010 (virt), 0xc2c49010 (dma)
xhci_hcd 0000:01:00.0: Ring enq updated 1 times
xhci_hcd 0000:01:00.0: // xHC command ring deq ptr low bits + flags = @00000008
xhci_hcd 0000:01:00.0: // xHC command ring deq ptr high bits = @00000000

  • 0 in reply to Holger Eberhard102906
    Genius 4570 points

    The message "Timeout while waiting for a slot" occurs in function xhci_alloc_dev().

    I can not see the reason for this at the moment.

  • 0 in reply to Holger Eberhard102906
    Genius 4570 points

    For testing I added some debug output of "Port Status and Control Register (PORTSC)" in xhci_event_ring_work.

    I do not have a USB device plugged at startup (modeprobe xhci_hcd). The "Timeout while waiting for a slot" message does not occur in this case. After connect an external USB3.0 -> port 0 status registers changes from 0x2a0 to 0x21203. After disconnecting the device -> port 0 status registers changes from 0x21203 to 0x202a0. I also tested this behavior with a USB2.0 device and port 2 status register. This behavior seems to be OK.

    But we do not have a real detection of the connected USB device.

    Does anybody have experience with this issue ?

     

    7242.teraterm.log

  • 0 in reply to Holger Eberhard102906
    Genius 4570 points

    Last but not least – I found the problem.

    DM8168 PCI Express to uDP720202 connection shouldt use MSI (Message Signaled Interrupts).

    But the initialization in xhci kernel module uses MSI-X.

    The setup of MSI-X is successful but no event / interrupt signalisation hangs later.

    With MSI, event and interrupt handling is running.

    So I have tested access to USB2 and USB3.0 devices via µPD720202, it works well.