Hello,
My DM8168 receives a RGB-24 video on VIP0, with Hsync & Vsync signals.
Input comes from a 1080p60 source, clock is 148.5MHz, Hsync 67.5kHz and Vsync 60Hz, data is 24 bits wide.
My VIP_PARSER_MAIN is set to 0x0 (24b port A)
My VIP_PARSER_port_a is set to 0x150a (/Vsync, /Hsync, Enable, discrete 24b sync)
VIP_PARSER_output_port_a_src0_size reports a correct line count (bits 10:0) but my width (pixel count) is wrong, it keeps reporting 0x98 even if I toggle the Hsync polarity.
Sync & clock are dedicated pins, pinmux is set to default.
Do I need to configure some other bits?
Best regards,
Lo