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nand boot mode Issue with ROM code

Dear  all
 
we are trying the Nandboot mode in our customized board
 
Details of Hardware
Processor           : Dm8168
Nand Flash        : MT29F8G16ABACAWP-IT:C (Page Size:4096  Spare/OOB:224).
                             In gpmc Interface using CS0.
Boot Switch details    : Nand mode 10010(BOOT Mode 4:0)
 
 
ISSUE: Nand boot mode is not working (Observation: No boot-up prints on console)
 
This are the following queries:
 
1: Could you please tell us DM8168 ROM boot Code supports the Page_size = 4096 Bytes and Spare_size = 224 Bytes ?
2: Does ROM boot code has an intelligence to get the page size details and spare size details from the nand device when power-on the board ?
3: Will ROM boot Code check for the bad block in nand device ?
4: If ROM code is capable of checking for the bad block, then up to how many bad blocks it will check and read the data from the nand device ?       
5: Is Soft ECC supported by ROM Code ?
 
 
Below are the information extracted from the TRM for the behaviour of ROM code:
 
---------------------------------TRM Details regarding ROM code---------------------------------------------  
The NAND flash memory is not XIP and requires shadowing before the code can be executed. The
features include:
• GPMC as the communication interface
• Device from 512Mbit (64 MByte)
• ×8 and ×16 bus width
Support for large page size (2048 bytes + 64 spare bytes) or very large page size 4096 bytes + 128 /
    218 spare bytes)
• CE don’t care devices only
• Single Level Cell (SLC) and Multiple Level Cell (MLC) devices
• Device Identification based on ONFI or ROM table
• ECC correction : 8 bits/sector for most devices (16b/sector for devices with large spare area)
• GPMC timings adjusted for NAND access
• 55 MHz GPMC clock
• Device connected to CS0
• Wait pin signal WAITPIN0 connected to NAND BUSY output
• Four physical blocks are searched for an image. The block size depends on device.
The initialization routine for NAND devices consists in three parts: GPMC initialization, device detection
with parameters determination and finally bad block detection.
------------------------------------END----------------------------------------------------------------------
 
Please let us know your suggestions on the above mentioned queries
 
Any input from the forum members would be highly appreciated.
   
Thanks  
Narthan S

  • Hi Narthan,

    DM816x ROM code supports page size of 4094 + spare size of 224. For more info see:

    DM816x TRM, Table 25-12. Supported NAND Devices

    http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/t/308384.aspx

    http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/t/179173.aspx

    http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/t/233142.aspx

    Best egards,
    Pavel

  • Dear Pavel,

    Thanks for your valuable links,  now read and write is fine in uboot using BCH8 (HW ECC), but when i tried to flash uboot to nand using CCS tool, the board is not booting.

    Please let us know, what may be the reason behind the uboot not booting up on our board? Is there any other configuration required by the bootloader, that we are missing?

    Also, is bootloader compatible to NAND page size, OOB size and ECC logic of our board?

    Below are the changes i did to the CCS Nand flash source code

    please find the attached log flashing using CCS tool

    2275.CCS_NAND_FLASH_LOG.txt
    [CortexA8] Welcome to CCS Nand Flash Utility 
    
    
    Choose your operation 
    Enter 1 ---> To Flash an Image
    Enter 2 ---> To ERASE the whole NAND 
    Enter 3 ---> To EXIT
    1
    Enter image file path 
    D:\CCS_DM8168\u-boot.noxip.bin
    Enter offset (in hex): 
    0
    Choose the ECC scheme from given options :
    Enter 1 ---> BCH 8-bit 
    Enter 2 ---> HAM  
    Enter 3 ---> T0 EXIT
    Please enter ECC scheme type :
    1
    Starting NETRA NAND writerbus with 16
    
    
    ----------------------
      NAND FLASH DETAILS
    ----------------------
     Device ID : 0xc3
     Manufacture ID : 0x2c
     Page Size : 4096 Bytes
     Spare Size : 224 Bytes
     Pages_Per_Block : 64
     Number_of_Blocks : 4096
     Device_width : 2 Byte
     DeviceSize : 1024 MB
    
     Setting the ECC scheme
      Set the BCH 8 bit ECC scheme  .... done
    Preparing to Flash image .... 
    Opening image ... done. 
    Erasing Required Blocks [start = 0, count = 1]...Done
    Flashing image ... 
    Number of blocks needed for header and data: 0x1
    Attempting to start write in block number 0x0.
    Writing image data to Block 0 Page0x0
    Writing image data to Block 0 Page0x1
    Writing image data to Block 0 Page0x2
    Writing image data to Block 0 Page0x3
    Writing image data to Block 0 Page0x4
    Writing image data to Block 0 Page0x5
    Writing image data to Block 0 Page0x6
    Writing image data to Block 0 Page0x7
    Writing image data to Block 0 Page0x8
    Writing image data to Block 0 Page0x9
    Writing image data to Block 0 Page0xa
    Writing image data to Block 0 Page0xb
    Writing image data to Block 0 Page0xc
    Writing image data to Block 0 Page0xd
    Writing image data to Block 0 Page0xe
    Writing image data to Block 0 Page0xf
    Writing image data to Block 0 Page0x10
    Writing image data to Block 0 Page0x11
    Writing image data to Block 0 Page0x12
    Writing image data to Block 0 Page0x13
    Writing image data to Block 0 Page0x14
    Writing image data to Block 0 Page0x15
    Writing image data to Block 0 Page0x16
    Writing image data to Block 0 Page0x17
    Writing image data to Block 0 Page0x18
    Writing image data to Block 0 Page0x19
    Writing image data to Block 0 Page0x1a
    Writing image data to Block 0 Page0x1b
    Writing image data to Block 0 Page0x1c
    Writing image data to Block 0 Page0x1d
    Writing image data to Block 0 Page0x1e
    Writing image data to Block 0 Page0x1f
    Writing image data to Block 0 Page0x20
    Writing image data to Block 0 Page0x21
    Writing image data to Block 0 Page0x22
    Writing image data to Block 0 Page0x23
    Writing image data to Block 0 Page0x24
    Writing image data to Block 0 Page0x25
    Writing image data to Block 0 Page0x26
    Writing image data to Block 0 Page0x27
    Writing image data to Block 0 Page0x28
    Writing image data to Block 0 Page0x29
    Writing image data to Block 0 Page0x2a
    Writing image data to Block 0 Page0x2b
    Writing image data to Block 0 Page0x2c
    Writing image data to Block 0 Page0x2d
    Writing image data to Block 0 Page0x2e
    Writing image data to Block 0 Page0x2f
    Writing image data to Block 0 Page0x30
    Writing image data to Block 0 Page0x31
    Writing image data to Block 0 Page0x32
    Writing image data to Block 0 Page0x33
    Image successfully flashed
    
    
    NAND flashing successful!
    

    -----------------------------------CCS Nand Flash Source----------------------------------------------------

    NETRA_flashGetDetails()

      // Use JEDEC manufacturer ID from Parameter Page
        hNandInfo->manfID = devID[0];
     
        // Use Device ID from the standard READID command
        hNandInfo->devID = (Uint8) devID[1];
        hNandInfo->dataBytesPerPage = 1024 << (devID[3] & 0x3); // Last two bits give Page size
        hNandInfo->spareBytesPerPage = 224;
        blocksize = 64 << ((devID[3] >> 4) & 0x3); // Bit 4,5 give Block size;
        hNandInfo->pagesPerBlock = (blocksize * 1024) / hNandInfo->dataBytesPerPage;

    ----------------------------------------------------------End------------------------------------------------------------------

    One more procedure we tried to flash u-boot from sd-card boot mode.

    Booted uboot in Sd-card mode and u-boot image is written to the 0x00 block of the nand. (using BCH-8 with nand switch in on state).  once operation is finished power-off the board and boot switch is modified to nand boot mode (10010) (4:0) and power-on the board No boot-up prints on console.

    ISSUE: Nand boot mode is not working (Observation: No boot-up prints on console) .

    Thanks,

    Narthan S

  • Narthan,

    Please refer to the below e2e post:

    http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/p/366352/1299255.aspx#1299255

    Regards,
    Pavel

  • Dear Pavel,

           Thanks for your previous input, In Spectrum Digital (EVM Dm8168) board have a socket for nand chip, we replace the nand of Dm8168 with our nand flash(MT29F8G16ABACAWP-IT:C (Page Size:4096  Spare/OOB:224). 

    I tried the below following tests on EVM  Dm8168 with out nand flash chip.

    prerequisite step: always HW-ECC (BCH8) is used while flashing u-boot Image to nand flash

    Placed the boot mode switch's in Nand boot mode (10010)(4:0 boot switch positions)

    1) First i erase the nand chip completely and through CCS tool I flash the u-boot image successfully to the nand flash,  power-off the board and power-on the board no prints are coming in console.

    To Verify the image is written to flash is proper or not ,  once again the boot switch's are moved to SD card mode and booted. read the u-boot Image from the nand flash to some location to the ram (such as: 0x82000000) and using go command executed. u-boot is executed successfully .

    2)Second through SD card booting mode uboot is flashed to the nand chip power-off the board and move the switch to the nand boot mode and power on the board no prints are coming in console.  

    what may be the reason nand mode in not booting at all ?

    ISSUE: Nand boot mode is not working (Observation: No boot-up prints on console) .

    Please let us know your suggestions on the above mentioned queries

    Thanks,

    Narthan S 

  • Narthan,

    See if the below e2e thread will be in help:

    http://e2e.ti.com/support/arm/sitara_arm/f/791/t/224132.aspx

    Best regards,
    Pavel

  • Dear Pavel,

    Thanks for that e2e thread. That speaks about ECC, which helped me to understand ECC concepts.

    The below nand flash we are using in our custom design:

    MT29F8G16ABACAWP-IT:C (Page Size:4096 Spare/OOB:224).

    For the nand flash (MT29F8G16ABACAWP-IT:C), minimum required ECC 8-bit ECC per 540 bytes of data

    According to DM8168 TRM, 8 bit ECC is supported by the Gpmc and ELM (Error locator module).

    Below are some doubts, we have related to the current scenario:

    -> what is the ECC level(ECC level means (1bit Ecc , 2bit Ecc ....16bit ecc ..etc)) supported by the ROM Code Boot Loader in the Dm8168 processor ?

    I referred the below concepts in the TRM

    "ROM Code Memory and Peripheral Booting"

    -> who will initialize the ddr in the Nand boot mode and whats the exact bootup sequence from rom code to uboot prompt?

    -> Any clear information on compatibility of our NAND flash with DM8168 processor?

    Thanks,
    Narthan S

  • Narthan,

    Narthan Murthy said:
    -> what is the ECC level(ECC level means (1bit Ecc , 2bit Ecc ....16bit ecc ..etc)) supported by the ROM Code Boot Loader in the Dm8168 processor ?

    The DM816x ROM code use BCH8 (8-bit ECC) by default. See DM816x TRM, section 25.7.3 NAND and the below wiki:

    http://processors.wiki.ti.com/index.php/TI81XX_PSP_NAND_Driver_User_Guide#ECC_schemes_usage_table

    http://processors.wiki.ti.com/index.php/TI81XX_PSP_UBOOT_User_Guide#NAND_ECC_algorithm_selection

    http://processors.wiki.ti.com/index.php/TI81XX_PSP_FAQ#NAND

    http://processors.wiki.ti.com/index.php/TI81XX_PSP_Flashing_Tools_Guide#Burning_images_to_NAND_Flash_.28using_CCS.29

    Regards,
    Pavel

  • Narthan,

    Narthan Murthy said:
    -> who will initialize the ddr in the Nand boot mode and whats the exact bootup sequence from rom code to uboot prompt?

    The DM816x device has large internal RAM memory (OCMC RAM), 512KB, thus we have only one bootloader - u-boot.noxip.bin (in case of NAND boot). In case of NAND boot, the ROM Code loads the u-boot.bin (u-boot.noxip.bin) from NAND flash into internal RAM (OCMC RAM). And this u-boot.bin is initializing the DDR memory.

    See u-boot-2010.06-psp04.04.00.01/board/ti/ti8168/evm.c

    void s_init(u32 in_ddr)
    {
        /*
         * Disable Write Allocate on miss to avoid starvation of other masters
         * (than A8).
         *
         * Ref DM816x Erratum: TODO
         */
        l2_disable_wa();

        l2_cache_enable();        /* Can be removed as A8 comes up with L2 enabled */
    #ifdef CONFIG_SETUP_1V
        __raw_writel(0x102, 0x4818155c);
        while((__raw_readl(0x4818155c) & 0x3) != 0x2);

        __raw_writel(0x102, 0x48181560);
        while((__raw_readl(0x48181560) & 0x3) != 0x2);

        __raw_writel(0x00000001, 0x4803213c);
        __raw_writel(0xfffffff0, 0x48032134);
    #endif

        prcm_init(in_ddr);            /* Setup the PLLs and the clocks for the peripherals */
        set_muxconf_regs();
        if (!in_ddr)
            config_ti816x_sdram_ddr();    /* Do DDR settings */
    #ifdef CONFIG_TI816X_VOLT_SCALE
        voltage_scale_init();
    #endif
    }

  • Also, make sure you have all the NAND related patches from the ti81xx-master branch in your linux kernel and u-boot:

    http://arago-project.org/git/projects/u-boot-omap3.git?p=projects%2Fu-boot-omap3.git&a=search&h=refs%2Fheads%2Fti81xx-master&st=commit&s=nand

    http://arago-project.org/git/projects/?p=linux-omap3.git&a=search&h=refs%2Fheads%2Fti81xx-master&st=commit&s=nand

    Regards,
    Pavel

  • Dear Pavel,

                  Thanks for above links and information now (BCH 16 ) read and write is working fine in U-boot. but in our board SD Card is not supported.  do we have 16 BCH ECC Support is available  for flashing nand flash using CCS source tool.

    Thanks,

    Narthan S 

  • Narthan,

    Narthan Murthy said:
    do we have 16 BCH ECC Support is available  for flashing nand flash using CCS source tool.

    No, BCH16 ECC for CCS flasher is not supported:

    http://processors.wiki.ti.com/index.php/TI81XX_PSP_Flashing_Tools_Guide#Burning_images_to_NAND_Flash_.28using_CCS.29

    • Select ECC for flashing. Always select BCH8 for U-Boot as the ROM code uses the BCH8 ECC scheme. Enter 1 for u-boot. NOTE: Hamming code is not supported in this release
         Choose the ECC scheme from given options 
    Enter 1 ---> BCH 8 bit
    Enter 2 ---> HAM
    Enter 3 ---> T0 EXIT
    Please enter ECC scheme type :

    Narthan Murthy said:
    but in our board SD Card is not supported.


    You can try flash the NAND chip through EMAC:

    http://processors.wiki.ti.com/index.php/TI81XX_PSP_UBOOT_User_Guide#Flashing_U-Boot_without_CCS

    TI816X support SD Flash ans EMAC Flash.

    EMAC-Flash-Method

    This method involves using EMAC boot mode to get to the U-Boot prompt and then flashing the U-Boot image to NAND or SPI as required.

    Regards,
    Pavel