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DM816x AVS. Non-Linux driver implementation.

Hello.

Our company is using DM816x CYGA2 in one of industrial microcontrollers.

We are using NUCLEUS RTOS kernel as SW base.

We have found out that there is no information regarding SmartReflex in TM for the CPU. We are missing description of peripherial registers.

We have found the "linux-2.5.37-psp04.00.00.12" on TI support site. There is AVS driver implemented there.

How to implement AVS driver in non-Linux system without SR peripherial description? How to get get HVT and SVT values from registers and how to handle interrupts?

Is it safe to fix voltage on 1V level until we will implement AVS driver?

Also I have found the:

1. http://processors.wiki.ti.com/index.php/TI81XX_PSP_AVS_FAQ#Modifications_required_for_AVS_operation_on_older_revisions_of_the_TI816X_EVM

2. http://processors.wiki.ti.com/index.php/TI81XX_PSP_PM_AVS_Driver_User_Guide

 Both description says that operating voltage window is 800mV to 1050 mV. However in lateest datasheet  the recommended window is 0.85V - 1.00V (page 137).

What should we use in our system?

Also I have a question regarding AVS operation in general: with increasing of CPU temperature the operating voltage should be increased or decreased?

We found in latest datasheet on page 140 an example that CPU similar to one we use with 60C case temperature has AVS Variable Core voltage = 0.8 V. But according to page 137 I expected to see at least 0.85V. Please comment this? What core coltage is expected?

If recommended window is 0.85V - 1.00V then please provide recalculated values of gain min limit for SR.

  • Hi Petro,

    Petro Karashchenko said:

    We are using NUCLEUS RTOS kernel as SW base.

    We have found out that there is no information regarding SmartReflex in TM for the CPU. We are missing description of peripherial registers.

    Petro Karashchenko said:
    How to implement AVS driver in non-Linux system without SR peripherial description? How to get get HVT and SVT values from registers and how to handle interrupts?

    The hardware side of the SmartReflex-AVS is described in the DM816x TRM and datasheet. We have two SmartReflex modules (SmartReflex0 and SmartReflex1). Note also that we have info regarding the SmartReflex-AVS in the DM816x Silicon Errata as well.

    Regarding the SmartReflex-AVS registers, in DM816x public TRM we have only the base/start addresses: 0x48188000 for SmartReflex0 and 0x4818A000 for SmartReflex1. The rest of the SmartReflex-AVS registers (offset and description) is described in internal document which is available only through TI FAE/local representative and under NDA.

    Meanwhile you can explore the driver in linux kernel:

    http://processors.wiki.ti.com/index.php/TI81XX_PSP_PM_AVS_Driver_User_Guide

    Other useful wiki pages can be:

    http://processors.wiki.ti.com/index.php/DM816x_Design_Resources

    http://processors.wiki.ti.com/index.php/TI81XX_PSP_AVS_FAQ

    http://elinux.org/OMAP_Power_Management/SmartReflex

    You can also have a look in the OMAP44xx public TRM, section 3.13 SR Register Manual. The registers of the SmartReflex should be similar between DM816x and OMAP44xx device.

    Petro Karashchenko said:
    We have found the "linux-2.5.37-psp04.00.00.12" on TI support site. There is AVS driver implemented there.

    This is very old release. Please refer to the newest DM816x SmartReflex linux kernel SW at:

    http://arago-project.org/git/projects/?p=linux-omap3.git;a=shortlog;h=refs/heads/ti81xx-master

    I will have a look on your other questions and provide you my feedback later.

    Regards,
    Pavel

  • Petro,

    Petro Karashchenko said:
    Is it safe to fix voltage on 1V level until we will implement AVS driver?

    You can disable AVS and use constant/fixed voltage, but this is not recommended and used only for debug purpose. See the below links for more info:

    http://processors.wiki.ti.com/index.php/DM816x_Design_Resources#Requirements

    http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/p/254686/903492.aspx#903492

    http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/p/250529/878774.aspx#878774

    http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/p/360053/1267874.aspx#1267874

    http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/p/230843/811426.aspx#811426

    I will have a look on your other questions and provide you my feedback later.

    Best regards,
    Pavel

  • Hello Pavel.

    I'm still missing answer on below:

    Both description says that operating voltage window is 800mV to 1050 mV. However in lateest datasheet  the recommended window is 0.85V - 1.00V (page 137).

    What should we use in our system?

    Also I have a question regarding AVS operation in general: with increasing of CPU temperature the operating voltage should be increased or decreased?

    We found in latest datasheet on page 140 an example that CPU similar to one we use with 60C case temperature has AVS Variable Core voltage = 0.8 V. But according to page 137 I expected to see at least 0.85V. Please comment this? What core coltage is expected?

    If recommended window is 0.85V - 1.00V then please provide recalculated values of gain min limit for SR.

  • Petro,

    Petro Karashchenko said:

    Also I have found the:

    1. http://processors.wiki.ti.com/index.php/TI81XX_PSP_AVS_FAQ#Modifications_required_for_AVS_operation_on_older_revisions_of_the_TI816X_EVM

    2. http://processors.wiki.ti.com/index.php/TI81XX_PSP_PM_AVS_Driver_User_Guide

     Both description says that operating voltage window is 800mV to 1050 mV. However in lateest datasheet  the recommended window is 0.85V - 1.00V (page 137).

    What should we use in our system?

    Usually the DM816x datasheet is with highest priority. But note that 0.85V to 1.00V is the nominal value.

    min value is 0.8075 (SRnom x 0.95 ) = (0.85 x 0.95)

    max value is 1.05V (SRnom × 1.05) = (1.00 × 1.05)

    Thus we are aligned with the wiki pages.

    Note that not every chip can work at min/lower voltage level. This voltage level is different chip from chip.  AVS driver will determine it for you. 

    The meaning of this range is that your power supply should be able to provide 0.8V to 1.05V on 1V_AVS pin of DM8168 based on the smartreflex output. DM8168 by default cannot run at 0.8V but based on process, temperature nodes, AVS can scale it between 0.8V to 1.05V.

    See also if the below e2e thread will be in help:

    http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/t/156119.aspx

    Petro Karashchenko said:
    Also I have a question regarding AVS operation in general: with increasing of CPU temperature the operating voltage should be increased or decreased?

    With increasing of temperature, the SmartReflex AVS will try to decrease the voltage.

    http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/717/p/181624/655239.aspx#655239

    Does SmartReflex actually adjust the core voltage dynamically?  Under what conditions?  If it adjusts on temperature, how is the temperature measured?  If the system temperature is monitored, can this be used to adjust the core temperature to help with the issue of higher power at higher temperatures?

    Yes, it will set the voltage dynamically under these variables temperature, process, ageing etc. Sensors (HVT and SVT) on the device will monitor the device characteristics.

    NO, it will not adjust the temperature but it will reduce the current operating voltage, so that device temperature is reduced.

  •  I understand that this thread has the following open quesitons:

    - Also I have a question regarding AVS operation in general: with increasing of CPU temperature the operating voltage should be increased or decreased?

    TI: This is not a concern for the customer.  The Smart Reflex logic within the DM8168 device will determine whether a voltage change is needed as the temperature rises and falls.  The AVS driver code monitors the Smart Reflex logic to command voltage changes when needed.

    We found in latest datasheet on page 140 an example that CPU similar to one we use with 60C case temperature has AVS Variable Core voltage = 0.8 V. But according to page 137 I expected to see at least 0.85V. Please comment this?
    - What core coltage is expected?

    TI: The AVS CVDD voltage is normally in the range between 850mV and 950mV.  This voltage is determined by the Smart Reflex logic based on the needs of the individual device.  Each device is unique based on its silicon process strength.  Different devices may request different voltages when operated on the same board running the same application at the same temperature.

    - If recommended window is 0.85V - 1.00V then please provide recalculated values of gain min limit for SR.

    TI:  What power supply are you using?  This information should already be available in the driver for the solution that you are using.

    Tom