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TMS320DM8168 processor booting issue and inconsistency

Other Parts Discussed in Thread: TMS320DM8168

Hi,

We have an application board designed with TMS320DM8168 processor. The board has been working fine since one year. Presently, we are observing several inconsistencies :

1] Boot from NAND Flash is inconsistent: 

2] Not able to boot from MMC Card 

3] We have tried to debug using CCS V5 (Spectrum Digital XDS100 V2 JTAG). When we are trying to load the .GEL file, below error message was observed:

-----------------------------------------------------------------------------

CortexA8: GEL Output: EVM816x Startup Sequence

CortexA8: GEL Output: PRCM Setup Complete
CortexA8: GEL Output: Configuring Pad Functions...
CortexA8: Trouble Writing Memory Block at 0x48140adc on Page 0 of Length 0x4: (Error -2130 @ 0x48140ADC) Unable to access device memory. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.232.0)
CortexA8: GEL: Error while executing OnTargetConnect(): Target failed to write 0x48140ADC at *((unsigned int *) (0x48140000+0x0ADC))=(unsigned int) 1 [CABS_AVRM_sd_SW_level_allCS.gel:325] at Setup_PADCTRL() [CABS_AVRM_sd_SW_level_allCS.gel:45] at OnTargetConnect() .
CortexA8: Trouble Reading Register CP15_Registers_CP15_CONTROL_REGISTER: (Error -2131 @ 0x20013F00) Unable to access device register. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.232.0)
CortexA8: Trouble Reading Register CP15_Registers_CP15_CONTROL_REGISTER: (Error -2131 @ 0x20013F00) Unable to access device register. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.232.0)
CortexA8: Trouble Reading Register CP15_Registers_CP15_MMU_XLATION_TABLE_BASE_CONTROL: (Error -2131 @ 0x20023F40) Unable to access device register. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.232.0)
CortexA8: Trouble Reading Register CP15_Registers_CP15_MMU_XLATION_TABLE_BASE_0: (Error -2131 @ 0x20023F00) Unable to access device register. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.232.0)
CortexA8: Trouble Reading Register CP15_Registers_CP15_MMU_XLATION_TABLE_BASE_1: (Error -2131 @ 0x20023F20) Unable to access device register. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.232.0)
CortexA8: Trouble Reading Register CP15_Registers_CP15_MMU_DOMAIN_ACCESS_CONTROL: (Error -2131 @ 0x20033F00) Unable to access device register. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.232.0)

--------------------------------------------------------------------------

Referring to the processor datasheet, we identified that the above memory block address (0x48140adc) belongs to GPMC control registers. We hence disabled the GPMC initialization after which we observed that "GEL file loaded successfully" . In our application board, GPMC bus is used for NAND access. We have probed the GPMC bus signals and is proper.

We would be helped if You provide us suggestion on this issue.

 

Thanks.

  • Hi,

    Moving your post to right forum to be better answered.

    Thanks & regards,
    Sivaraj K
  • Hi,

    Thanks, we are looking forward for suggestions. Any further info required?
  • Hi Chitra,

    Which GEL file you are using? Can you attach it here?

    Chitra Ramakrishnan1 said:
    Referring to the processor datasheet, we identified that the above memory block address (0x48140adc) belongs to GPMC control registers.

    Where exactly in DM816x datasheet you find this? I am looking in DM816x datasheet SPRS614F and on page 131 I see this is PINCTRL184 register with belongs to the Control Module, not to GPMC.


    See also the below wiki pages with guidelines for non-booting boards:

    BR
    Pavel

  • Dear Pavel,

    Thanks for helping us. As advised, GEL file is attached herewith.

    DM8168_CustomBoard GEL.gel

    Yes, the address where there was a failure observed belongs to PIN control register. And each time we try to connect to target through CCS, we find same/different address getting failed under the same "PINCTRLx Registers" section.

    Let us give clear picture of the set-up and the issue here.

    In our board, set of Pins are to be configured as GPMC pins and interfaced to a FPGA. In the GEL file, we initialize these pins as GPMC functionality by making use of the "PINCTRLx Registers". We find the error occurring to any of these set of Pins while trying to write to the PINCTRLx register.

    We have shared one set of example of failure in our first post, where the memory access to 0x48140ADC failed.

    This issue started coming after board was being used for about 1 year. Initially on the same hardware, we were able to configure the pins successfully as GPMC mode and use them from our Linux drivers to communicate to the externally interfaced FPGA.

    We are unable to understand what is causing the error which is intermittent, but fixed to "PINCTRLx Registers" access.

    Also, as an experiment, we skipped the PINCTRL initialization for those set of Pins (but other Pins for different interfaces being configured), and we found the GEL file initialization to be successful.

    Below are the PINCTRL register addresses we require to be configured as GPMC pins:

    0x48140B34, 0x48140ADC, 0x48140AD8, 0x48140AE8, 0x48140B10, 0x48140AEC, 0x48140ACC, 0x48140AC8, 0x48140AC4, 0x48140AC0, 0x48140AA4, 0x48140AA0, 0x48140CA0, 0x48140B30, 0x48140AFC

    Best regards.

  • Hello,

    This looks to me HW malfunction problem, I do not see SW reason for this issue.

    Do you observe this issue in only one custom board?

    Can you try to set other mode in the PINCTRL184/0x48140ADC register (like UART1_CTSn, GPMC_A[17], GP1[26]), do you still observe the same issue?

    Can you try to access PINCTRL184/0x48140ADC register also from u-boot, do you still observe the same issue?

    Check again your HW design, align with DM816x datasheet and DM816x TI EVM.

    BR
    Pavel
  • HI Pavel,

    Thanks for the support .

    After your reply, we carried out some more experiments.

    We tried accessing the relevant  "PINCTRLx Registers" for different modes other than the required mode(GPMC mode). We tested the GEL file initialisation by configuring those  "PINCTRLx Registers"to mode 0/1/2. But we found that in any of the modes the  "PINCTRLx Registers" configuration fails.

    So, we suspect that the "PINCTRLx Registers" module has got corrupted.

    Also, another observation is sometimes on power cycle JTAG connection fails when we  try connecting target(CortexA8).

    So, could you please help us in narrowing down on what is the issue and what might have caused such issue after ~1 year of use.

    Thanks,

    Chitra

  • Hi Pavel,

    FYR Summary as per above discussion:

    • Issue related PINCTRL register configuration failing while loading GEL file.
    • Sometimes JTAG connection fails when we  try connecting target.
    • If GEL file loaded succesfully, then memory test will be failling.
    • The same board we have used for almost 1 year and conducted multiple burn in test.

    We couldn't analyse the root cause of this issue, so we replaced the processor on same board. Now, JTAG connection is consistent and PINCTRL register configuration succesfull. While intilalzing EMIF1  controller we are observing the below error message:

    -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

    CortexA8: GEL Output: EVM816x Startup Sequence

    CortexA8: GEL Output: PRCM Setup Complete
    CortexA8: GEL Output: Configuring Pad Functions...
    CortexA8: Output:     Main PLL Init is in Progress, Please wait .....
    CortexA8: Output:     Main PLL Init is Done .....
    CortexA8: Output:     EVM816x DDR PLL Init is in Progress for 796 MHz DDR Clock, Please wait .....
    CortexA8: Output:     DDR3 Selected.
    CortexA8: Output:     DM816x DDR PLL Init is Done .....
    CortexA8: Output:     EVM816x DDR2/3 PRCM Init is in progress .....
    CortexA8: Output:     EVM816x DDR2/3 PRCM Init is Done .....
    CortexA8: Output:     Initializing EMIF1 .....
    CortexA8: Trouble Writing Memory Block at 0x4d000010 on Page 0 of Length 0x4: (Error -2130 @ 0x4D000010) Unable to access device memory. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.232.0)
    CortexA8: GEL: Error while executing OnTargetConnect(): Target failed to write 0x4D000010     at *((unsigned int *) (0x4D000000+0x10))=(unsigned int) (0x10000000|SDREF) [CABS_AVRM_V2.gel:325]     at EMIF4P_Init(0x1779C9EE, 0x50607FF4, 0x009F857F, (0x10001844&0xfffffff), 0x62A73832, 0x00100110) [CABS_AVRM_V2.gel:1333]     at Setup_DDR() [CABS_AVRM_V2.gel:47]     at OnTargetConnect() .
    CortexA8: Trouble Reading Register CP15_Registers_CP15_CONTROL_REGISTER: (Error -2131 @ 0x20013F00) Unable to access device register. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.232.0)

    ----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

    We have tried by disabling EMIF 1 controller in the same GEL file and it has loaded successfully.

    -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

    CortexA8: GEL Output: EVM816x Startup Sequence

    CortexA8: GEL Output: PRCM Setup Complete
    CortexA8: GEL Output: Configuring Pad Functions...
    CortexA8: Output:     Main PLL Init is in Progress, Please wait .....
    CortexA8: Output:     Main PLL Init is Done .....
    CortexA8: Output:     EVM816x DDR PLL Init is in Progress for 796 MHz DDR Clock, Please wait .....
    CortexA8: Output:     DDR3 Selected.
    CortexA8: Output:     DM816x DDR PLL Init is Done .....
    CortexA8: Output:     EVM816x DDR2/3 PRCM Init is in progress .....
    CortexA8: Output:     EVM816x DDR2/3 PRCM Init is Done .....
    CortexA8: Output:     DDR3 SWLEVELING DONE FOR EMIF0
    CortexA8: Output:     DDR3 SWLEVELING DONE FOR EMIF1
    CortexA8: Output:     DM816x EMIF Init is Done @ 796MHz Clock Rate.....
    CortexA8: GEL Output: Startup Complete.
    --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

    Kindly let me know your inputs / suggestions.

    Thanks & Regards,

    Chitra

  • Chitra,

    Vijay Varma said:
    CortexA8: Trouble Writing Memory Block at 0x4d000010 on Page 0 of Length 0x4: (Error -2130 @ 0x4D000010) Unable to access device memory. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.232.0)
    CortexA8: GEL: Error while executing OnTargetConnect(): Target failed to write 0x4D000010     at *((unsigned int *) (0x4D000000+0x10))=(unsigned int) (0x10000000|SDREF) [CABS_AVRM_V2.gel:325]     at EMIF4P_Init(0x1779C9EE, 0x50607FF4, 0x009F857F, (0x10001844&0xfffffff), 0x62A73832, 0x00100110) [CABS_AVRM_V2.gel:1333]     at Setup_DDR() [CABS_AVRM_V2.gel:47]     at OnTargetConnect() .

    The below e2e threads discuss this error:

    Regards,
    Pavel