DaVinci™ Video Processors

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DaVinci™ Video Processors

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8168 c6accel code engine
Related Posts

  • Forum Post: RE: Calling DSP function

    std
    Hi TI, Please help to reply to the above question. I need your reply to decide on what TI software tool to use. Thanks, Mr Tan
    on Apr 26, 2012

  • Forum Post: RE: Calling DSP function

    std
    Hi TI, Please respond to my above question . Thanks, Mr Tan
    on Apr 27, 2012

  • Forum Post: Calling DSP function

    std
    Hi, If I use C6accel tool for ARM core to run DSP function on DSP core, it has high timing overhead. To achieve good timing, It needs the DSP function to run asynchronously with some ARM tasks. If there is no ARM task to run, the DSP function might run slower than the ARM function due to timing...
    on Apr 25, 2012

  • Forum Post: RE: tvp5158 driver for DM8168 SOC

    Ashraf Niazi
    Thanx Yogesh. Since I was out of city for a long days thats why not reply u. I need H.264 compression on video data. Its seems like M3 is good option. but initially I need to collect the video data from TVP5158 from A8 core. Interface must be successful. My second question is I am using DM8168...
    on Jun 13, 2012

  • Forum Post: Encoder performance issue

    Karthik Kumar
    Hi, We have been using the OMX encode application(H264) of omx version omx_05_02_00_15 for Netra board. We observed a drop in encoder performance(number of frames encoded per second) occasionally. Is this behavior a known issue in the version mentioned and has it been fixed in later releases? Regards...
    on Aug 13, 2012

  • Forum Post: RE: DM8168 DSP optimization

    Xavier15128
    Hi, 910JQK I use DVRRDK_02.80.00.10 on dm8168 evm board, but i do not kown how to start dsp develop then ? Is there any alg demos sorece code in this kit? I only find the params configure interface of scd , and where is scd alg source code ? Could you give me some suggestions how to start dsp...
    on Sep 10, 2012

  • Forum Post: Building Syslink DSP(slave) side sample binaries

    Shahzad Muzaffar
    hi, I am trying to build Syslink DSP side application binaries to test my Syslink integration with HLOS based RTOS. I have the following confusions that are not clear from documentation: 1- "CGT_C674_ELF_INSTALL_DIR" where to find these and i want to build it witout EZSDK using other tool...
    on Aug 13, 2012

  • Forum Post: How to set interrupt as FALLINGEDGE on 8168 ?

    mahesh kalmeshwar
    Hi, I am using GPIO pin # 20 for generating for interrupt on 8168. i made requesting gpio and seting direction and converting gpio to irq. Now I wanna(set) make this as FALLINGEDGE. How do set irq fro FALLINGEDGE on 8168? is any function i need use(pls mention the name of function) ? I read...
    on Jan 22, 2013

  • Forum Post: RE: Is there an ERROR on evm816xiodc_Schematics_RevC pin connections?

    David Soto
    Hi Hardik, After get the dual capture working and test it with the saLoopBack application I started with gstreamer, mainly I wanted to run two different pipelines, each pipeline capturing from a different port. However, I found that gstreamer is having problems to work properly in this case, basically...
    on Feb 19, 2013

  • Forum Post: RE: Video Capture DM816x VIN1 BT656

    David Soto
    Hi Brijesh, Yes, I would suppose that that value 0x00000414 means an overflow on the port (not sure what means each bit on this register), however, this overflow is being caused by the absence of the SoG signal, because using gstreamer with the SoG enabled I can use the pipeline without problems and...
    on Mar 4, 2013

  • Forum Post: RE: Video Capture DM816x VIN1 BT656

    David Soto
    Hi Brijesh, Thanks for your comments. For the time being I am using a very simple pipeline which works when the SoG signal is enabled, also I am not using OMX to capture since I am using the V4L2 capture driver: gst-launch v4l2src device=/dev/video0 always-copy=false queue-size=8 ! 'video/x-raw...
    on Mar 8, 2013

  • Forum Post: HDVICP & HDVPSS fails to start after watchdog reset kickoff

    sadasivappa s
    Hi, We are working on Netra DM8168 based custom board. Where Watchdog out pin is not gated to reset switch. My question is, is it possible to reset M3 cores without External watchdog out pin using software? if yes please let me know how and where to do it (in u-boot or linux). My test case is as...
    on Jan 30, 2013

  • Forum Post: memory allocation for v4l2

    echo yang
    Hello, I am working with dm8168evm and ezsdk5.05.And we are trying to capture 720p picture and pass the streams to the codec engine. But I am not sure how to get continous memory for v4l2. Do I have to memmap the cmem pool memory to the user space?And how the frameQ manage video frames? I am not...
    on May 17, 2013

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