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TI Home » TI E2E Community » Support Forums » Digital Signal Processors (DSP) » DaVinci™ Video Processors » DM816x, C6A816x and AM389x Processors Forum » All Tags » McASP
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DaVinci™ Video Processors

Welcome to the DaVinci™ Video Processors Section of the TI E2E Support Community. Ask questions, share knowledge, explore ideas, and help solve problems with fellow engineers. To post a question, click on the forum tab then "New Post".

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McASP
  • 9022a
  • ADC
  • ALSA
  • audio
  • Clock
  • clocks
  • dm8168
  • DM816x
  • edma
  • EDMA3
  • i2s
  • SPI
Related Posts
  • Forum Post: clock enable for McASP

    benlu yu benlu yu
    I have enabled McASP clock use ARM Linux API clk_enable(), I found the register addr from kernel API: McASP0 0x48181540 McASP1 0x48181544 McASP2 0x48181548 I set those register's 2nd bit to 1, but still can't control other register from McASP, am I set right?
    on Mar 2, 2012
  • Forum Post: EDMA3 and McASP driver problem

    benlu yu benlu yu
    Hi, I have a question about EDMA transfer when I using McASP TDM format on C6A8168. I porting the McASP driver form ARM, and I have checked the register's value with McASP data manual. [DSP] globalctl:0x0 [DSP] pwremumgt:0x2 [DSP] txditctl:0x0 [DSP] lopbakctl:0x0 [DSP] amutectl:0x0 [DSP] rxmask...
    on Apr 25, 2012
  • Forum Post: EDMA problem

    powersoft powersoft powersoft powersoft
    Hi all I am working with the C6A8168 EVB, and I am investigating about the EDMA usage. So I have written a DSP demo application which generate a 1Kz signal using buffers transfered by edma to MCASP2 wired to a aic306 codec. This application work fine if loaded in to the dsp by CCS5-XDS100V2, but it doesn't...
    on May 4, 2012
  • Forum Post: DM816x McASP rxDataPort address

    Paolo Desii Paolo Desii
    Ha all, I'm using the DM8168 device and I have to use McASP1 port in trasmission mode using data port, but in documentation I don't find the right address to use for write data port (XBUF data port register. See TMS320DM816x DaVinci Video Processors Technical Reference Manual - sprugx8.pdf...
    on Oct 8, 2012
  • Forum Post: DM8168 MCASP FIFO ADDRESS

    Paolo Desii Paolo Desii
    Hello to all, I 'm using the MCASP1 to transmit data to two DACs with success. The write port s are served by EDMA and everything works fine. Address used for XBUF0 is 0x4803C200 and for XBUF1 is 0x4803C204. Now I need to extend the architecture using the fifo of MCASP1 . To this I added MCASP1...
    on Oct 9, 2012
  • Forum Post: RE: Try to enable the 9022a for HDMI audio output

    ChengYeh Yu ChengYeh Yu
    Hi, Here are two small updates, 1. McASP1 can output i2s clock after the snd_pcm_writei is called. 2. The DMA is still not working when I actually wire 9022a to McASP2 on the board. I suppose this means I need to configure 9022a to get the EDMA work? But it makes no sense to me. Any one can help...
    on Oct 23, 2012
  • Forum Post: Try porting SiI9022a audio to DM8168 and it cannot work

    ChengYeh Yu ChengYeh Yu
    Hi, We are using DVRRDK 03.00.00.00. And use the DVR board for our reference design. The SoC is DM8168, PG2.0 I followed this porting guide to attach my 9022a to McASP 1 as sound card0, port0, where the 5158 was. http://processors.wiki.ti.com/index.php/TI81xx_PSP_Porting_Guide#Audio_driver_.28McASP...
    on Oct 23, 2012
  • Forum Post: Mcasp multi-serializer(RX_MODE) for DM8168

    Zeang Benny Zeang Benny
    Hello, I'm an issue regarding the multi-serializer in receive mode(AXR0 to AXR1). Individually they work correctly, but simultaneously something is wrong. what can be done? static u8 ssm2602_iis_serializer_direction[] = { RX_MODE, RX_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE, INACTIVE_MODE...
    on Jan 3, 2013
  • Forum Post: SPI out of McASP

    Yaroslav Pokrovsky Yaroslav Pokrovsky
    Hi, is it possible to use McASP on DM8168 as SPI-master device? Thanks!
    on May 14, 2013
  • Forum Post: Connect SPI ADC using McASP on DM8168

    Yaroslav Pokrovsky Yaroslav Pokrovsky
    Hello! My goal is to use AD7887 ADC in two channels mode as sound capture device. ADC is connected to DM8168 through McASP interface pins: MCA2_AFSX -> /CS MCA2_ACLKX -> SCLK MCA2_AXR1 -> DIN MCA2_AXR0 -> DOUT This ADC works fine using SPI_MODE_2 when it is connected through SPI...
    on May 14, 2013
  • Forum Post: McASP master mode on DM8168

    Yaroslav Pokrovsky Yaroslav Pokrovsky
    Hi! I have to use McASP on DM8168 in I2S master mode: just generate on pins MCA2_ACLKX and MCA2_AFSX frequency and frame sync signals appropriately. Data is transmitted through MCA2_AXR0 and MCA2_AXR1. I made the next changes in machine driver: davinci-evm.c: #define AUDIO_FORMAT (SND_SOC_DAIFMT_DSP_B...
    on May 20, 2013
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