CPU : Davinci DM6467
DSP: BIOS 5.41
OS : Linux 2.6.32
DVSDK: 3.10.0.16
Hi,
We are developing a set top box using Dm6467. The settop box can plays back DVB streams on a connected TV set.
The settop box supports both SD (Standard definition) and HD (Hi Definition streams). The SD streams are in H.262 video formats and HD streams are in H.264 video formats.
McASp is uses to transmit the audio data in I2S format. We are playing back sound at 48 KHz sample rate.
While implementing the SD stream playback we observed that quite frequently the Sound_write routine would fail. Upon investigation we observed that it was due to the fact that the XUNDRN bitwould get set in the the XSTAT register of the McASP.
Since we are using the EDMA to transfer data to the McASP it was clear that the EDMA was not transferring the data to the McASP within the time slot and hence the McASP would set the XUNDRN bit and would stop transferring data all together. Additionally since the McASP does'nt have the support to recover from the underrun condition the sound data transmission would fail.
Also it was observed that if only sound is playe but not video (which goes via the VPIF port) then there would be no glitches at all.
Upon investigation into the davinci_pcm driver we observed that EDMA Queue 0 was uses as transfer queue both for McASP and also for other peripheral such as VDCE.
We changed the EDMA transfer queue for McASP to Event queue 1 after which the problem got solved and the we could see the SD video and audio playing quite well.
But now when we are implementing the HD stream playback we observe the same issue. The Sound_write fails due to XUNDRN condition bit getting set.
We are very sure that data is available to the McASP from the application side but some how the DMA fails
So the query is
1) Is it possible that the McASP DMA does not get hold of the system bus for transfer during the I2S time slot and hence the underrun cindition occurs?
2) We also tried changing the bus priority of the Transfer queue related to McASP via the MSTPRI2 register but that dind help either.
3) For playing back HD streams the vpif clock was increased . Could this cause any problems?
4) Is it possible that the HDVICP peripherals occupy the system bus for such a long time that it causes underrun to occur in McASP.
Please let me know of any suggestions on the same
Thanks and Regards
Mohammed Anwar