Dm6435 vpfe hang on video input interrupted

Massimo

DM6435, raw video acquisition from an fpga with external sync.

For application dependent reasons, the video stream can be randomly interrupted, even in the middle of a frame, and restarted with a brand new frame after some time.

The idea is to reset the VPSS with the PSC to recover after the video in "break", before enabling the vpfe again.

The problem is that sometimes the PSC_PTSTAT flag doesn't get cleared, like if some activity was still pending inside the peripheral. The code is below.

Is this something expected?
Can there be a workaround?

Of course the answer should be… never interrupt the video, but again it’s something that they cannot control.

Best regards
Massimo

============

     #define PSC_BASE                0x01C41000
     #define PSC_PTCMD               *((volatile UINT32 *) (PSC_BASE + 0x120))
     #define PSC_PTSTAT              *((volatile UINT32 *) (PSC_BASE + 0x128))
     #define PSC_MDCTL_BASE          (PSC_BASE + 0xA00)

…

// disable the CCD controller writing 0 to PCR.ENABLE

.....

*((volatile UINT32 *) (PSC_MDCTL_BASE + 0)) = 0x1;
*((volatile UINT32 *) (PSC_MDCTL_BASE + 4)) = 0x1;

PSC_PTCMD = 0x0001; // Transition power (ALWAYSON)

while (PSC_PTSTAT & 0x0001) ; // Wait for transtion to finish /// HANGS HERE SOMETIMES

*((volatile UINT32 *) (PSC_MDCTL_BASE + 0)) = 0x3;
*((volatile UINT32 *) (PSC_MDCTL_BASE + 4)) = 0x3;

PSC_PTCMD = 0x0001; // Transition power (ALWAYSON)

while (PSC_PTSTAT & 0x0001) ; // Wait for transtion to finish

over 9 years ago

0 Mukul Bhatnagar over 9 years ago

TI__Guru* 78435 points

Hi Massimo

Without knowing too much about the VPSS hook up on DM643x or in general VPSS arch, but knowing PSC, I think this "should" happen. It is PSC's job to not allow reset or clock stop if there is any internal state machine within the module logic that is still active. That is what allows a graceful clock stop, because a clock stop request is "ack" by the module only when all logic within the state machine is ideally "idle".

Likely 2 ways to see if you can work around the "intended" feature

1) Go through VPSS/VPFE registers and try to clear and flush any pending activity before trying this localized PSC initiated reset.

2) See if writing a 1 to MDCTL.VPFE bit 31 , along with writing to do a syncreset, works. In most PSC modules this bit 31 is undocumented force shut down bit , and will not for an ack coming back from the peripheral and just do the psc transition.

Keep in mind that if #2 works , it is not something we can add in the documentation or guarantee to work, as it is not documented so likely not tested extensively at chip level, but might just work out.

Regards

Mukul

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Dm6435 vpfe hang on video input interrupted