DM6446: Disable/Enable GPIO1/2 from ARM ....whole interrupt bank 0 gets disabled?

Neki

I have interrupts coming on GPIO 1 or 2 every 2 ms. I want to disable GPIO 1 when I serve GPIO 2 ISR and vice versa.

Upto IRQ 47, we have register bits available to enable / disable them. GPIO 0 to GPIO 7 fall in Interrupt bank 0 and there is a register for interrupt bank 0 which is enabling / disabling whole bank of interrupts.

How do I enable/disable one particular GPIO in that bank?

Regards

Neil

over 9 years ago

0 Titusrathinaraj Stalin over 9 years ago

TI__Guru** 116100 points

Hi Neki,
What is your Linux kernel version and SDK details please ?
Try to sue "irq_disable" function while you server other IRQ in ISR.

0 Neki over 9 years ago in reply to Titusrathinaraj Stalin

Prodigy 160 points

Hi Stalin,

Thanks a lot Stalin for responding.

I use Integrity RTOS which puts me in backseat to do even the smallest thing.

There are two 32 bit registers EINT0 and EINT1 which allow enable/disabling the interrupts . EINT0 has its 32 bits mapped for IRQ 0-31 and EINT1 has its LSB 16 bits mapped to IRQ31-47 and remaining 16 bits are reserved for future.

GPIO 0-7 have IRQ 48-55 which are not mapped to EINT1 so I cannot disable them directly.
I am sure I am missing something.These GPIOs must be using some other register for enabling and disabling them which I am unable to get.

which is best Linux kernel you recommend?

Thanks once again Stalin.

Regards
Neil

0 Titusrathinaraj Stalin over 9 years ago in reply to Neki

TI__Guru** 116100 points

Always we recommend to use TI's SDK.
processors.wiki.ti.com/.../DaVinci_%28ARM9%29_PSP_Releases

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DM6446: Disable/Enable GPIO1/2 from ARM ....whole interrupt bank 0 gets disabled?