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c64x+ dsp on dm6446 goes out of memory range

varun sharma1
Prodigy 240 points

Hi,

I am working on  DM6446 DSP, but sometimes after execution it goes out of its memory.

When i checked its registers status, i observed following things

  1. TSR shows interrupt blocked bit set to 1, interrupt execution bit set to 1
  2. IFR shows its 5 and 6 bit set to 1
  3. IER and IEER register both having value zero.

So from this i believe is it something to do with interrupt handling as it shows two interrupt bits set or is it normal for DSP to latch two interrupts bits.

Please guide if dsp can go out from its memory range from some other issue also.

Regards

  • 0
    TI__Mastermind 35645 points

    Hi,

    Thanks for your post.

    I would suggest you to check the linker command file (.cmd) and recommend you to specify the section allocation to external memory (DDR) or shared RAM if applicable instead of internal memory (L1D, L2) incase if you have allocated. Kindly check it and change it to external if allocated internal memory, thereafter, you could try execute the code to avoid memory out of range.

    I don't think, there is relation between memory out of range and interrupt bit set but still, please check if there is any error interrupt asserted and try to rectify it on the cause.

    It depends on the type of interrupt being set to say if it is normal for DSP or not since it matters if any error interrupt  being triggered. Kindly check what type of interrupt it is and evaluate whether the interrupt latched is expected or something abnormal.

    Thanks & regards,

    Sivaraj K

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  • 0 in reply to Sivaraj Kuppuraj
    Prodigy 240 points
    Hi,

    My project require real time processing so i am using internal memory of DSP(L1,L2 Both) as RAM.

    I wanted to ask about the second point in my previous post
    i.e. IFR shows its 5 and 6 bit set to 1, is this a normal thing , i mean two interrupt flags set at one time.

    Regards
  • 0 in reply to varun sharma1
    TI__Mastermind 35645 points

    Hi,

    It is absolutely normal since each interrupt flag is defined for unique functionality and there is nothing wrong in setting two interrupts at one time.

    What are those interrupts being set for and it is been asserted for? Kindly provide us more details on the interrupt being set for and what for it is being asserted for? what do you notify on these interrupts being triggered for? Without knowing all these details, we may not able to conclude the root cause of your "out of memory range" issue since there are different type of interrupts being used for different functionalities and for instance, system/hardware interrupts and peripheral events been triggered as interrupts, interrupts asserted for error events conditions and so on.

    I don't think, your issue is related to inappropriate interrupt flags set and if you use DSP internal memory for your necessity, but kindly ensure to use valid address ranges of L1D and L2 RAM and as well please check it doesn't exceed the memory size of internal memories.

    Thanks & regards,

    Sivaraj K

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  • 0 in reply to varun sharma1
    TI__Mastermind 35645 points

    Hi,

    Thanks for your update.

    If IFR shows bits 5 and 6 been set, it indicates the CPU maskable interrupts (INT5, INT6) being asserted. Normally, if these interrupts are been enabled in CPU and when it receives these maskable CPU interrupts, it will post the corresponding flags to the BITn field in the IFR.

    Usually if any system exceptions being enabled in CPU, the exception signal (EXCEP) will be recorded in the CPU’s exception flag register (EFR) and if not enabled in CPU, the non maskable interrupt (INT1) will act as interupt and when received, it will post a flag to BIT1 field in the IFR register. For more info. on CPU interrupt controller interface, please refer section 7.4.1 in c64x reference guide as below:

    http://www.ti.com/lit/ug/spru871k/spru871k.pdf

    Thanks & regards,

    Sivaraj K

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  • 0 in reply to Sivaraj Kuppuraj
    Prodigy 240 points

    Hi,

    I sorted it out, in ERRATA document of DM6446, it says that L2 memory should not be 100% RAM and if it is so then EDMA should not access, but my McBSP buffer which EDMA is using was in L2 RAM, which was creating problem, so i removed it from L2 RAM and it is working now.

    Regards