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VIP/VPDMA Firmware load in VPDMA_LIST_ADDR makes the system hangs in Jacinto DRA7xx


We are trying to write a Video Input Port(VIP) driver for DRA74xx processor which should finally transfer data to a DDR location via VPDMA.

The decoder TW9966 which gives camera data in BT656 format that is interfaced to VIP1 Slice1-Port A (8 lines).Following is the VIP initialization of YUV422 input in
BT656.

//reset port
write_vreg(VIP_PARSER_PORTA_0, VIP_SW_RESET);
SAL_Delay(200);
write_vreg(VIP_PARSER_PORTA_0, 0);

//set port enable
val = 0;
val |= VIP_PORT_ENABLE;
write_vreg(VIP_PARSER_PORTA_0, val);

//data interface
val = 0;
insert_field(&val, DUAL_8B_INTERFACE, VIP_DATA_INTERFACE_MODE_MASK, VIP_DATA_INTERFACE_MODE_SHFT);
write_vreg(VIP_PARSER_MAIN_CFG, val);
//sync type
val = read_vreg(VIP_PARSER_PORTA_0);
insert_field(&val, EMBEDDED_SYNC_SINGLE_YUV422, VIP_SYNC_TYPE_MASK, VIP_SYNC_TYPE_SHFT);
write_vreg(VIP_PARSER_PORTA_0, val);

But when i am trying to initialize the firmware of VPDMA to VPDMA_LIST_ADDR ,the system hangs.

extern const unsigned char vpdma_fw[];
write_sreg(VPDMA_LIST_ADDR, (unsigned int)vpdma_fw);

Can you let me know why the system hangs?. We have kept the op-codes of VPDMA firmware in a global array and trying to point the address of the same. Is this method of loading firmware ok? Have attached the vpdma hex code used.

This code is taken from “kernel/firmware/vpdma-1b8.fw” Is this version of firmware and the way VPDMA_LIST_ADDR initialization are ok ?Please help us on the same.

Thanks for the support.

With regards,
Jeyaseelan