DaVinci™ Video Processors

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DaVinci™ Video Processors

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C6A8168
Related Posts

  • Blog Post: Our newest generation of Integra™ DSP + ARM® processors are announced today!

    VineetGanju
    Today, we introduced the Integra™ platform of DSP + ARM® processors to our portfolio. The C6A816x Integra DSP + ARM processors, the newest generation of Integra processors, contain the industry’s highest-performing single-core floating- and fixed-point DSP at up to 1.5 GHz and the highest...
    on Oct 19, 2010

  • Blog Post: Register for TI’s ARM TechCon course: Complementing ARM with Easy DSP Development for TI’s Community Platforms

    VineetGanju
    TI is hosting an introductory course at ARM TechCon to discuss the new, free C6EZRun and C6EZAccel tools, which developers quickly and simply leverage the digital signal processor (DSP) from within their ARM® applications and code. The C6EZRun is an open source development tool that makes it easy...
    on Nov 2, 2010

  • Forum Post: Availability of budget development board

    Trevor Johnson
    Is there any recent news regarding the budget development board , please?
    on Feb 9, 2011

  • Forum Post: TI816x RAM Restriction

    Tom Schneider
    Hello, I am seeing a RAM restriction at 768 MB (with a 2GB stick installed). Here are my boot settings: bootargs=console=ttyS2,115200n8 root=/dev/mmcblk0p2 rw mem=1000M earlyprink vram=10M ti816xfb.vram=0:16M,1:16M,2:6M; bootcmd=mmc init;fatload mmc 0 0x80300000 uImage;bootm 0x080300000;...
    on Mar 1, 2011

  • Forum Post: hardware divide in DSP core?

    Calum Mackinnon
    For the integra and OMAP families do the DSP's have divide hardware in them? Cheers Calum
    on Mar 3, 2011

  • Forum Post: Sys/Link MessageQ crashing

    Dan Chizek
    I have a TI81xx EVM board and am running into issues with the MessageQ crashing on the DSP side. I am getting an assert in ListMP_getHead around line 411. It appears to me that is an issue where the Q isnt locking out the other processor properly when accessing the ListMP object. It happens in the SWI...
    on Apr 28, 2011

  • Forum Post: C6A8168 vs. DM8168

    Sy Tran
    Is C6A8168 architecture and peripherals the same as the DM8168? Particularly I am interested in the video ports and package pinout, are they compatible? Can I layout the PCBA for the C6A8168 and do software development on the C6A8168 then later on use the DM8168 as a drop in replacement pin to pin and...
    on Jun 18, 2011

  • Forum Post: Video input output combination

    Sy Tran
    Is there a table showing what video input & output combination that I can use concurently on the C6A8168 & DM8168? Are these combinations work with the DM8148 also? Regards, Sy
    on Jun 18, 2011

  • Forum Post: USB port vs. USB OTG

    Sy Tran
    In the sprugx9, it shows that the USB Subsystem includes the PHY. However I saw other block diagrams and schematics else where use the TPS65950 to connect to the USB. IS this because the USB subsystems PHY is a client only and the TPS65950 contains the signaling for the USB-OTG? If true then the C6A8168...
    on Jun 18, 2011

  • Forum Post: Android support for the C6-Integra DSP+ARM?

    Nolte Joubert
    Hi, We are currently developing a device based on the Integra-C6 DSP+ARM hardware platform. Ideally, we would like to use Android as our software platform, preferably 2.3.x (Gingerbread), although 2.2 will also suffice. I saw a post by MarcPyne on 11-23-2010 in this thread that the relevant DDR3 EVM...
    on Jul 8, 2011

  • Forum Post: Max frequencies for Cotex and other interfaces

    Mahesh Shinde
    Hello, I am referring to Product Preview data sheet for TMS320C6A8168 (SPRS680A, – OCTOBER 2010 – REVISED MARCH 2011) . Note1 for tables in the device operating conditions sections states that " Data in this table is based on device operation at 1.0 GHz for the...
    on Jul 11, 2011

  • Forum Post: How can I use VGA port of C6A8168 for display?

    song
    Hi, everyone I am a beginner of C6A8168. I want to use the VGA port as the display interface, but I don't know how to make the settings. I read the VPSS user guide in EZSDK. HDMI port is using /dev/fb0, I think VGA port and Component port are using /dev/fb1 for display , because they...
    on Jul 12, 2011

  • Forum Post: VPSS Capture specifications/limitations

    Pierre-Olivier Belzile
    We are in the process of selecting a cpu for our next gen platform and got a question about the video capture capability of DM8168. I understand that the the VPSS sub system runs on a separate mcu and has its own closed firmware. 1- Is there still an hardware interface for programming the capture...
    on Jul 13, 2011

  • Forum Post: UPDATED: procmgrapp problem while loading 8168's M3s (for video subsystem bringup).

    Juan Solis
    All, We're seeing problems when attempting to load the dm816xbm_m3video.xem3 and dm816xbm_m3vpss.xem3 images onto the CortexM3 s of an 8168 processor. We've been perusing the forums and have seen similar problems reported by others but the problems/solutions don't quite match what...
    on Jul 19, 2011

  • Forum Post: 2D FFT float point with c6a8168 and c6accel memory slow

    Patrick Emer
    Hi, i have implemted a 2D FFT with the first Devel Board and with c6accel and with floating points. The implementation of the 2D FFT runs exlusivly on the DSP link side. Now i have realiset that the first dimionsion of the FFT if it runs on the same memory, runs well fast. For example: ...
    on Jul 24, 2011

  • Forum Post: DM8148 - TAPs and IR count

    Shahzad Muzaffar
    Hi, Please can you tell me that total number/count of TAP s and IR s in DM8148 ? Also please tell me the number of default TAP that is selected and used to debug? Thank you in advance and waiting for response.
    on Aug 11, 2011

  • Forum Post: When will be the next Android Release for TI8168..?

    valeswararao d
    Hi guys, We are workimg on Sitara evm 8168 with TI-Android-GingerBread-2.3-DevKit- 2.0 release. It seems , it was released in april , and it was so long . When will be the next release with updated patches for issues..? can i use DevKit- 2.1 release. for AM3894[TI8168]..? Thanks...
    on Sep 14, 2011

  • Forum Post: C6A8168: DDR 3 Configuration

    KENJI SASAKI
    Hi, I have a question about the restrictions that applies to DDR3 device configuration. We have designed the memory configuration of our system, as per your TRM, as follows: EMIF0-CS0: 2Gb(x16) x 2 parallel connection, 32bit access EMIF0-CS1: 2Gb(x16) x 2 parallel connection, 32bit access EMIF1-CS0:...
    on Oct 5, 2011

  • Forum Post: problem loading dsp application on DM8168 evm using syslink.

    Igor Reyzin
    I made an xdc version of "Hello World" application and tried to load it with the syslink slaveloader app. Below is the code and makefile I used: prog.c #include <xdc/runtime/System.h> int main() { System_printf("Hello World\n"); return 0; } common.mak XDCROOT...
    on Oct 7, 2011

  • Forum Post: DM8168 EVM boot option

    Maurizio6434
    Normal 0 14 false false false IT X-NONE X-NONE MicrosoftInternetExplorer4 ...
    on Oct 12, 2011

  • Forum Post: Can not boot from SD card of DM8168 EVM

    Xavier15128
    hi, guys! I start my work follow the "DM816x/C6A816x/AM389x Evaluation Module Quick Start Guide", and the result is there is no video output through HDMI, what is the problem? the follow pictures is the sw3 and sw4 of EVM board, and there following context in the uart output...
    on Oct 24, 2011

  • Forum Post: CA816x: Error running syslink frameq: Syslink FrameQ osalIsr_install: request_irq failed

    Bandeg
    Hello: I have compiled the syslink examples and attempted to run frameq on a custom CA8168 board. I have successfully loaded the syslink module, and this is what I get when I run frameq. Note that it is complaining first about irqs. Any ideas on how I can resolve this? Regards, --b ...
    on Oct 24, 2011

  • Forum Post: Wake-on-Lan on C6-Integra

    mastupristi
    Is it possible to implement Wake-on-Lan feature on C6-Integra? Is it done by hardware or by OS? thanks
    on Oct 25, 2011

  • Forum Post: DM8168 RDK 16-Channel DVR's Memory Map

    Bandeg
    Hello: How do I learn more about the RDK's Memory map and how it is configured in the software and at start-up. The EZSDK Memory Map document describes the Memory Configuration Flow using the memsegdef_default.c for the EVM. Is there a similar document that describes the memory configuration...
    on Oct 26, 2011

  • Forum Post: Re: Booting with NFS about DM8168 failure

    Xavier15128
    Hi AnilKumar Thank your for your answer. I tried your two steps .And the result is the same , IP-Config: Complete: device=eth0, addr=192.168.2.16, mask=255.255.255.0, gw=192.168.2.2, host=xavier, domain=, nis-domain=(none), bootserver=192.168.2.15, rootserver=192.168.2.15, rootpath= Waiting 4sec...
    on Oct 31, 2011
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