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TI Home » TI E2E Community » Support Forums » Digital Signal Processors (DSP) » OMAP™ Processors » OMAP-L13x, AM1x and C674x Processors Forum » OMAPL138 DDR2 512MBytes configuration
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    OMAPL138 DDR2 512MBytes configuration

    This question is answered
    Dmitry Gorulko
    Posted by Dmitry Gorulko
    on Mar 29 2012 05:08 AM
    Prodigy100 points

    Hello!

    In accordance with OMAPL138 specification it is possible to use up to 512MBytes of DDR2 memory.

    As I understand, 2 DDR2 chips must be used. I have been searching for appropriate configuration but have no success.

    The problem is I can see only DDR2 chips with 15-bit row and 10-bit column addressing (x8 banks) which actually allows to have 256MByte (8-bit) memory (x2 chips).

    But OMAPL138 has 14-bits row addressing. How can I get 512MByte configuration?

    Thank you!

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    • Brad Griffis
      Posted by Brad Griffis
      on Mar 30 2012 15:13 PM
      Verified Answer
      Verified by Dmitry Gorulko
      Guru57425 points

      All devices I've seen for 512MB require 15-bit row addressing, so I don't believe there's anything you can buy.  Although we can technically support 512MB it unfortunately seems that the necessary configuration is not sold by any memory manufacturers so that effectively limits the device to 256MB.

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    • Dmitry Gorulko
      Posted by Dmitry Gorulko
      on Mar 30 2012 21:04 PM
      Prodigy100 points

      Hmm... kind a trick from TI

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    • Brad Griffis
      Posted by Brad Griffis
      on Mar 30 2012 22:39 PM
      Guru57425 points
      We weren't trying to be deceptive. This was all specified many years ago before it was clear what memory organization would be common from the DDR2 vendors. We have filed a bug to change it to 256MB in the next data manual revision.

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