• Not Answered

OMAPL138, McASP clock divider


I have a customer using an OMAPL138 and ADS1274 and they are running into synchronization issues with the McASP bus. The data to the OMAP is either over-running or under-running. They have set up their clock source of the A/D to be 15.737 MHz to get 61kS/s on 4 input channels. The customer is using the time-division multiplexing to have all 4 data outputs on one signal.

The customer says that the 15.737 MHz SCLK line needs a 256 divider on the OMAP side, but the McASP interface's divisor goes from 0 to 32 only.

Please advise whether the McASP bus can be used for the 61kS/s output of the ADS1274. If so, how can the two parts synchronize?


9 Replies