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TI Home » TI E2E Community » Support Forums » Digital Signal Processors (DSP) » OMAP™ Processors » OMAP-L13x, AM1x and C674x Processors Forum » Could you please diagnose a AISgen error message?
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    Could you please diagnose a AISgen error message?

    This question is answered
    j-breeze
    Posted by j-breeze
    on Apr 11 2012 02:59 AM
    Expert1670 points

    Hi Champ,

    I tried to convert ELF into a boot image for C6745 by AISgen(D800K003 v0.7.0.0), and got a error message.
    I attached the error message box below.

    So, could you please diagnose the error message?
    And I'd like to know whether the AISgen(D800K003 v0.7.0.0) support  ELF input or not.

     

    Thanks in advance for your cooperation.

    Best regards,
    j-breeze 

    aisgen ELF Error Memory Overlap
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    • j-breeze
      Posted by j-breeze
      on Apr 11 2012 23:47 PM
      Expert1670 points

      Hi Champ,

      I'd like to know even whether the AISgen(D800K003 v0.7.0.0) support  ELF input or not A.S.A.P.

      Your cooperation would be appreciated.

      Best regards,
      j-breeze

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    • Mukul Bhatnagar
      Posted by Mukul Bhatnagar
      on Apr 12 2012 08:15 AM
      Mastermind24420 points

      Hi J-Breeze

      I apologize for the delay in responding back to this forum post. Unfortunately the current AISGEN D800K003 does not support ELF. This is in the to-do list for a subsequent release for this tool. I don't have the time lines for when this will be available, once I do, i will update this forum post.

      We regret the inconvenience this might be causing you/your customer. 

      Regards

      Mukul

       

       

      Don't forget to verify answers to your forum questions by using the green "Verify Answer" button.

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    • j-breeze
      Posted by j-breeze
      on Apr 12 2012 21:03 PM
      Expert1670 points

      Hi Mukul-san,

      Thank you for your reply.

      I realized that the tool did not support ELF.  However, could I ask you to put up the priority of the subsequent release?
      My customer is working for implementing dynamic linking. So they have to use ELF.

      Your considerrations would be appreciated.

      Best regards,
      j-breeze 

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    • Mukul Bhatnagar
      Posted by Mukul Bhatnagar
      on Apr 13 2012 10:17 AM
      Verified Answer
      Verified by j-breeze
      Mastermind24420 points

      Hi J-Breeze

      Please contact your local TI field team and provide details on the customer, their end application and need dates.

      We might be able to provide an beta release of the ELF supported AISGEN tools for this device end of April via TI local field team, if that helps.

      Final engineering release might take additional time.

      Regards

      Mukul

       

       

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    • j-breeze
      Posted by j-breeze
      on Apr 15 2012 21:54 PM
      Expert1670 points

      Hi Mukul-san,

      I'd appreciated your kindly consideration.
      I contacted the local FAE in Japan and he will contact you soon.

      Thanks in advance for your support.

      Best regards,
      j-breeze

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    • j-breeze
      Posted by j-breeze
      on Jul 20 2012 04:54 AM
      Expert1670 points

      Hi Mukul-san,

      I'd like to ask you a favor again.
      It's about AISgen warning messages below, mentioned in my first post.

        WARNING: Memory overlap from 0xC03AC0F0 to 0xC03AC0FF
        WARNING: Memory overlap from 0xC03AC100 to 0xC03AC1EF

      If you have any, could you please let me know why  the warning messages are indicated?

      Thanks in advance for your support.

      Best regards,
      j-breeze

      aisgen Memory Overlap Warning
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    • Rahul Prabhu
      Posted by Rahul Prabhu
      on Jul 20 2012 13:05 PM
      Genius15455 points

      Hi j-breeze,

      Can you see from the map file of your Boot.out file what section is being loaded in the region 0XC03ACOFF and 0XC03AC1EF.  Did you see any warnings from the linker when you built the out file? Are you passing 2 input files to the AISGen tool?  If yes, can you confirm that there is no overlap in the linker sections in the DSP UBL and the application code.

      Regards,

      Rahul

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    • j-breeze
      Posted by j-breeze
      on Jul 23 2012 01:21 AM
      Expert1670 points

      Hi Rahul,

      Thank you for your advice.

      I checked out  the map file and the sections below was being loaded in the region 0xC00CA528 and 0xC00CA53F.
      (The region was changed due to program updated.)

      ----------------------------------------------------------------------------------------------------------------------------------------------------------------

        .text.1    0    c00881a0    000423a0


                            :
                            :
                            :

                          c00ca480    00000038     c674xfastMath_elf.lib : exp2sp.obj (.text:hand)
                          c00ca4b8    00000038                           : expsp.obj (.text:hand)
                          c00ca4f0    00000038                           : log10sp.obj (.text:hand)
                          c00ca528    00000018     --HOLE-- [fill = 0]

        .const.2   0    c00ca528    00000008    

                          c00ca528    00000008     ParameterEdit.obj (.const:.string)

        .text.2    0    c00ca530    00000010    
                          c00ca530    00000010     Standby.obj ($Tramp$S$$EnterStandby) 

      ----------------------------------------------------------------------------------------------------------------------------------------------------------------

      "const.2" and "text.2" were overlaped with "--HOLE--" of "text.1".

      The linker v7.3.4 divided the sections automatically and  didn't generate any warnings.

      I don't know why the overlaps occur.
      So, could you please let me know the causes?
      Are there anything else what should I check out?

      Thanks in advance for your cooperation.

      Best regards,
      j-breeze 

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    • Rahul Prabhu
      Posted by Rahul Prabhu
      on Jul 23 2012 11:37 AM
      Genius15455 points

      Hi J-breeze,

      I don`t have complete understanding of how the linker works in this case but could you specify how you have specified the sections in the linker command file and if there is any flag that you have turned on in the linker that is suppressing any warnings. Do you have -v option with your linker perhaps that should give you a complete dump of the linker output.

      I would also try the following in the linker command

      .const:
       {
        " ${PATH_TO_OBJFILES}/ParameterEdit.obj"(.const.2)
       }
       .text:
       {
        " ${PATH_TO_OBJFILES}/Standby.obj"(.text.2)
       }

      PATH_TOOBJFILES is the path to the folder that contains the obj file Standby.obj and ParameterEdit.obj.

      This instructs the linker to place the split sections(.text.2 and .const.2) in the same place as the rest of the .text and .const section. If this doesn`t work I would have to consult an compiler expert to see how to resolve this issue. By the way did you try to boot the resulting AIS image (ignoring the warning), that might tell us how critical those warnings are.

      Regards,

      Rahul

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    • j-breeze
      Posted by j-breeze
      on Jul 24 2012 02:44 AM
      Expert1670 points

      Hi Rahul,

      Thank you for your suggestion.
      I'll try the linker command soon, that you showed me.

      And, the AIS image ignoring the warning works well so far because the sections are overlaped with the "HOLE" area, I guess.
      So, those overlap warnings might not be critical.

      However, I'd like to clarify the root causes and how to resolve this issue.

      The overlaps might be "bug" in the linker v7, according to a forum below.

        o Fetch packet exception thrown from trampolined functions
           (http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/164715/609248.aspx)

      Could you please refer to the forum,   especially last 2~3 posts in the forum.

      Thanks in advance for your cooperation.

      Best regards,
      j-breeze

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    • j-breeze
      Posted by j-breeze
      on Jul 25 2012 21:48 PM
      Expert1670 points

      Hi Rahul,

      I hope that you would consult an compiler expert about this issue.
      If you have any, please let me know.

      Your help would be highly appreciated.

      Best regards,
      j-breeze

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    • j-breeze
      Posted by j-breeze
      on Jul 27 2012 04:34 AM
      Verified Answer
      Verified by Rahul Prabhu
      Expert1670 points

      Hi Rahul,

      I was be able to found that the overlap was a bug in the linker v7 and confirmed that v7.3.6 or later solves it.

        o C6000 C/C++ CODE GENERATION TOOLS v7.3.7 Defect History

          <INSTALL_DIR>\C6000 Code Generation Tools 7.3.7\DefectHistory.txt
          - Line 161~174
            ----------------------
            FIXED  SDSCM00042408
            ----------------------

            Summary            : Linker creates overlapping sections

                                 when section allocation is done using
                                 ">>" operator
            Fixed in           : 7.3.6
            Severity           : S2 - Major
            Affected Component : Linker

            Description:
            Linker may create overlapping sections when section
            allocation is done using ">>" operator

      I really appreciate all your support.

      Best regards,
      j-breeze

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