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OMAP-L13x, AM1x and C674x Processors Forum
We are using OMAP-L138. On EMIFA interface we have connected CPLD on one chip select and on another chip select we have interface 4-Channel UART Controller (TL16C754C). From CPLD we will be getting data at a rate of (64 * 1000 * 2) Per second. We are using EDMA event to read data from CPLD.
The CPLD will generate GPIO event once for every two bytes. That means when we configure 64 Channel and 1000 Sample configuration we get a total of 64000 Events.
At the same we receive data over UART 50 Bytes/Sec but it is on different chip select.
When reading from CPLD and UART is enabled we observe that data recieved on UART is dropped.
Do, you have any suggestions to overcome this issue.
Do I need to change the Priorities in MSTPRIO[2:0] registers?
The values that I see are Prio0=0x44442222 Prio1=0x44440000 Prio2=0x14604404.
Reading from UART is in CPU mode, so do I need to increase ARM Data and Instruction priority to 0?
Is there any limitation on EMIFA that how many peripherals can be interfaced using different CS?
if you need more information please let me know, i will share it.
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