OMAP-L13x, AM1x and C674x Processors Forum - Recent Threads

Where to set the Pin Mux (boot strap, u-boot, kernel or rootfs)

Sreenivas Kowtharapu — Sat, 25 May 2013 06:14:07 GMT

hi ,

I am using AM1808, i want to remove the Ethernet (i.e EMAC (MMI)) and use URAT0, to do this where i have to set the PIN Mux values.

Thank you,

Sreenivas

L138: No external XDS560 Trace for both ARM/DSP?

Paul Singh — Fri, 24 May 2013 22:33:04 GMT

Hi,

When I was configuring CCS ≫ Tools ≫ Trace Control, I found among the five options “ETB, 560 V2 Trace, 560 Trace Pod, Pro Trace, None”:

ARM could only select ETB or None
C674X could only select “None”

as shown in the screenshot below:

I further checked “Table 5-145. DSP Debug Features” and “Table 5-146. ARM Debug Features” in SPRS586C and found

ARM has only ETB/ETM, but no ability to transfer CPU information to an external receiver like XDS560 Trace
DSP has only AET, no ETB, no ability to interface with XDS560 Trace

Am I correct with these observations?

And I guess the best I can use for the two cores are:

ARM: ETB
DSP: AET

Paul

SPI’s CSDEF bits

Paul Singh — Wed, 24 Apr 2013 16:39:13 GMT

Hi,

We have a question with L138’s SPI1’s chip select function.

For ‘SPI Default Chip Select Register (SPIDEF)’, all its seven bits[7-0] CSDEF[n] as described by TRM SPRUH77 are writable. However, the register view of CCS displays only one bit CSDEF0.

We currently have only attached a single device (SPI flash) to SPI1 port, so it is difficult to test other chip select pins. But does the screenshot here means the CCS display is incorrect, or the TRM contains incorrect information?

Paul

Linux freeze when launching SYSBIOS app

Stephane Mutz — Fri, 24 May 2013 18:28:02 GMT

Hello,

I'm starting on OMAPL137. I have a working Linux (MV5). I want to start prototyping a DSP application. I have some simple code on CCS5 that plays with GPIOs. It is compiled with SYSBIOS (but not using it for the GPIO at this moment). I can compile and connect to the board. When I load the program and suspend the DSP at entry point, the linux is running fine. As soon as I execute the initialization code (before calling main() ), the linux freezes.

I suspect a resource conflict vut I have not been able to pinpoint it. I have tried to deconfigure SYSBIOS to what seems a bare version (no clock, no timers, ...) but it didn't solve the probelm. Any advice?

Memory map for the Omap-L138 ARM

Walter Snafu — Fri, 24 May 2013 08:33:42 GMT

I'm trying to setup a linker command file for the OMAP-L138 to use with CCS. For the ARM core in particular.

I've tried to locate the memory map for the ARM core, but no luck. I looked in the OMAP-L138 Tech Ref manual. (page 108, for example).

Where can I find a memory map for the ARM core?

Thanks for your help.

UPDATE: I just noticed that CCS can supply a sample linker command file for the OMAP-L138, which includes a memory map for the ARM core. However, it only includes a memory map for the 64kB ROM (which I can't program or use), and the 8kB local RAM. But it doesn't give a memory map for the 16 kB instruction cache and the 16 kB data cache. Perhaps I have the wrong assumptions. I assumed I could 'freeze' my code into the 16kB instruction cache, thereby keeping it local to the ARM (and unperturbed by the DSP)

Some questions about fast RTS lib for C6748

Tiger Xu — Thu, 23 May 2013 13:22:00 GMT

I have some questions about fast rts lib for C6748:

1. What's the relations between mathlib, mathlib rts, rts lib, run-time-support arithmetic routines and fastRTS lib? Do they have totally same math functions? The main difference is the execution speed? which one is recommended in C6748?

2. At the beginning, I used RTS lib through including mathf.h in my code file. Although I can't find any RTS lib information in the linker option in CCS3.3, some RTS lib routines, such as log10f and powf, can work correctly in my programs. Then, I want these math functions to execute faster and try to use the fast RTS lib. I installed the c67xRTS lib(c67xmathlib_2_01_00_00). But I finally got a awful results after I included the c67fastMath.h in my code file and linked the 674xfastMath.lib in the linker option. Some codes and the execution results(CPU Execute Cycles) are listed below, it seems that these routines in RTS or fast RTS lib don't execute so fast as supposed. Both cj_rx_rs_I[i] and t are local variables in a function.

value of cj_rx_rs_I[i]              -2842.252   -2481.925   -1151.185 -5563.792   1475.33   -941.9764    7095.919
-----------------------------------------------------------------------------------------------------------------------------------------------
t=cj_rx_rs_I[i]*cj_rx_rs_I[i];       1631         676          664        1222        1031      1052         1620
t=powf(cj_rx_rs_I[i],2.0);           1600        1608        1652       1477        1596      1031         1570
t=powsp(cj_rx_rs_I[i],2.0);         1799        1964        1615       1482        1439      673          1125
t=1/cj_rx_rs_I[i];                      1419        1635        2119       1746        1800      2034         1571
t=recipsp(cj_rx_rs_I[i]);             1517        1134        1626       1210        1418      1233         1612

3. Why do c62x64xFastRTS lib and c67xFastRTS have different routines? Can c62x64xFastRTS lib be used in C6748? I want to use the "mpysp" routine to achieve a faster execution speed.

DSP evaluation board for audio amplitude modulation with 40kHz carrier?

Christoph Friebel — Thu, 23 May 2013 15:31:36 GMT

Hi,

i hope this is the right forum, this is my first post here...

I'm a student and need some advice in choosing the right and affordable dsp evaluation board.

For a project i need to do some real time amplitude modulation with an audio signal (music) and a 40-45 kHz carrier.

This signal needs to be amplified afterwards to be send on a ultrasonic transmitter grid.

Now i'm afraid to choose the wrong evaluation board and the audio outputs and DACs can't handle the 45 kHz...

Is the LCDK L138 Evaluation board suitable or do you know an other affordable evaluation board that can manage this?

I'd be very grateful for any help or advice.

Thank you in advance

Christoph

OMAP L138 LCDK New CCS user

Dave Szuter — Fri, 24 May 2013 04:15:35 GMT

Hi there,

I got my LCDK and XDS100v2 yesterday and successfully booted it up. Today I downloaded the offline version of CCS 5.4 (monster zip file) for Windows. When it asked which components I wanted installed I chose OMAP and XDS100 only. I figured OPAP would cover the L138 but apparently it does not. When I fired it up it had examples for OMAP 3 and 4, but not 1 series. I probably should have installed C6000 or maybe C6000 Arm + dsp, but I didn't. So now what do I do? I still have the large install folder. I would like to install examples for both cores of the L138, as well as SYSBIOS tools, EZFlo, and others, (pretty much all things related to OMAP L138 LCDK) but not sure how. Please advise. I really wish there were better instructions for us new folks. I have litterally spent weeks sorting though the thousands of docs and wikis you guys have, and I still can't find a simple set of instructions to get CSS set up for my particular platform. Please help. Thanks in advance.

OMAP-L138 DSP+Arm9 Dev Kit (LCDK): Beginner question

francois duchesneau — Wed, 22 May 2013 18:41:24 GMT

Hello,

We recently purchased the OMAP-L138 DSP+Arm9 Dev Kit (LCDK) with a XDS100v2 Jtag emulator. Our goal for now is to only use the C6748 DSP processor. We've able to run several examples projecst from the StarterWare ( pdk_C6748_2_0_0_0\C6748_StarterWare_1_20_03_03 ) without too much problems.

Unfortunately, we came up some issues while debugging (running) the code in CCS. For example, we tested the McASP demo (pdk_C6748_2_0_0_0\C6748_StarterWare_1_20_03_03\build\c674x\cgt_ccs\c6748\lcdkC6748\mcasp) and the first time we debug/run it, it works fine. The issue come when we terminate the debugging and restart the debugging. Generally, the application stop working correctly (even if the same code is executed). We have to manually reset the dev board before doing the debug to get it working again. Is it a normal behavior or a manipulation from our part?

Also, from time to time, while debuging, the device get held in reset and we have to remove the power to get it out of this state. What kind of manipulations can cause that?

We're using the OMAP-L138_LCDK.gel file (ti/ccsv5/ccs_base/emulation/board/lcdkomapl138/gel/OMAP-L138_LCDK.gel) with CCS v5.3.

Thank you,

Francois

SPI Interface error Message(OMAP-L137)

JG Kim — Thu, 23 May 2013 02:10:50 GMT

Hi, I use L137.

I want spi interface.

I success /dev/spidev0.0

spi.c

    [0]={
      .modalias = "spidev",
      .mode = SPI_MODE_0,
      .max_speed_hz = 6500000,   /* max sample rate at 3V */
      .bus_num=1,
      .chip_select=0,

}

When you run the test program, an error occurs.(spidev_test.c)

The error message is as follows.

//=====================================

Internal error: Oops: 17 [#1]
Modules linked in:
CPU: 0
PC is at davinci_spi_bufs_prep+0xc/0x47c
LR is at davinci_spi_bufs_dma+0xec/0x49c
pc : [<c0230fa4>]    lr : [<c023228c>]    Not tainted
sp : c04d5ea0 ip : c04d5eb0 fp : c04d5eac
r10: c04d4000 r9 : c04f3800 r8 : c34abef4
r7 : c04f3aa0 r6 : c05f3be0 r5 : c03336a8 r4 : 00000000
r3 : 00000008 r2 : 00000000 r1 : c04f3aa0 r0 : c04f3800
Flags: nZCv IRQs on FIQs on Mode SVC_32 Segment kernel
Control: 5317F
Table: C34A4000 DAC: 00000017
Process dm_spi.1 (pid: 178, stack limit = 0xc04d4258)
Stack: (0xc04d5ea0 to 0xc04d6000)
5ea0: c04d5efc c04d5eb0 c023228c c0230fa8 c04d4000 00000000 c04f3800 00000001
5ec0: 00000001 c04d5ed0 c0049d70 01e12000 c04d5efc c34abef4 00000000 c34abec8
5ee0: 00000000 c04f3aa0 c04f3800 c04d4000 c04d5f34 c04d5f00 c0230b5c c02321b0
5f00: c04f3ad4 00000000 c04d5f54 80000013 c05732a0 c04d4000 c04f3aa4 00000000
5f20: c02309d8 c04f3aa0 c04d5f6c c04d5f38 c00615b4 c02309e8 c05732b8 c05732a8
5f40: 00000002 00000000 c05732a8 c04d4000 c05732a0 c05732b0 00000002 c04d5f84
5f60: c04d5fcc c04d5f70 c0061dbc c00614e4 00000001 00000000 00000000 00010000
5f80: 00000000 00000000 c05d4600 c00499b4 00100100 00200200 ffffffff ffffffff
5fa0: 00000000 c05732a0 c04d4000 c0061cb4 c0471dd8 00000000 00000000 00000000
5fc0: c04d5ff4 c04d5fd0 c0064da4 c0061cc4 ffffffff ffffffff 00000000 00000000
5fe0: 00000000 00000000 00000000 c04d5ff8 c005172c c0064ccc 61747320 25206574
Backtrace:
[<c0230f98>] (davinci_spi_bufs_prep+0x0/0x47c) from [<c023228c>] (davinci_spi_b)
[<c02321a0>] (davinci_spi_bufs_dma+0x0/0x49c) from [<c0230b5c>] (bitbang_work+0)
[<c02309d8>] (bitbang_work+0x0/0x2d8) from [<c00615b4>] (run_workqueue+0xe0/0x1)
[<c00614d4>] (run_workqueue+0x0/0x170) from [<c0061dbc>] (worker_thread+0x108/0)
[<c0061cb4>] (worker_thread+0x0/0x144) from [<c0064da4>] (kthread+0xe8/0x128)
[<c0064cbc>] (kthread+0x0/0x128) from [<c005172c>] (do_exit+0x0/0xa24)
r7 = 00000000 r6 = 00000000 r5 = 00000000 r4 = 00000000
Code: e89da800 e1a0c00d e92dd800 e24cb004 (e5923010)

/=====================================

Help plz.

regard,

JG KIM

Omap L138 synchronization of 64 bit values ( e.g. double ) between ARM and C6000 DSP

Rob van de Voort — Tue, 02 Apr 2013 08:03:01 GMT

Hello,

I was wondering if the access to 64 bit values between ARM and C6000 can be synchronized so the access
looks atomic for ARM and C6000, do examples of this exist somewhere?

I was thinking of creating a function or macro to explicitly mark this synchronization but was searching for instructions or means
of synchronization that are present in the OMAP L138 to ease this process.
The C6000 supports instructions to load/store a double word [LDDW/STDW],
The ARM core supports GCC atomic builtins http://gcc.gnu.org/onlinedocs/gcc-4.2.0/gcc/Atomic-Builtins.html
The GCC builtins ( gcc 4.4+ )generate ARM instructions ( which can be regarded as atomic ) but do not take into account the C6000 i presume.
We are compiling code for Arm Linux EABI so this synchronization may be handled in our driver for the C6000 application.

Questions:

1. Do any helpful instructions exist to synchronize the C6000 and ARM when accessing 64 bit values,
or does this require a custom implementation?
2. Any suggestions on how to implement 64 bit synchronization between ARM and C6000 ( do examples exist? )

Regards,

Rob

AISgen binary serial flash format for OMAPL138

Kevin Halloran — Wed, 22 May 2013 16:11:47 GMT

We are able to program a LogicPD OMAPL138 SOM with no problem using AISgen & sfh_OMAP-L138.exe using a serial port on the EVM. That is fine initially but now we need to program the serial boot flash in the field for upgrades. We already have drivers for the serial flash but the question is the .bin file that is output by AISgen is this just the binary image to feed the serial boot flash starting at address 0? I ran AISgen with output to a .h file which creates an integer array and it looks that way but just want to confirm.

Thanks,

Kev

dynamic control of PINMUX registers between Hi-Z and any valid pin function

Naoki kawada — Fri, 24 May 2013 02:57:02 GMT

Hi,

I have a question about the dynamic control of PINMUX registers between Hi-Z and any valid pin function on C674x platform.

One of my customers wants to use some GPIOs as an output or Hi-Z, and they switch the pin feature dynamically in there system.
Please note, during Hi-Z pin condition, 1.485V～1.815V can be served to GPIO pin.

So, I suggested them to control PINMUX registers dynamically when the pins are required to be Hi-Z.

But now I'm wondering if this could be really allowed in the device HW point of view...
Could you please let me know if this can be TI's recommended solution to realize the customer's requirement ?

Best Regards,
Kawada

DSP won't wake ARM after power on reset

Rob Tice1 — Wed, 22 May 2013 20:13:33 GMT

I am using a custom board based around an OMAP-L138. I have a pull down resistor on TRST and a pull up on RESETn. When the board powers on, it does a power on reset and latches the boot pins (I can confirm this by connecting with my JTAG and looking at the SYSCFG0 register). The DSP then comes out of RESET. I would then expect it to wake the ARM core and follow the steps laid out in this wiki:

http://processors.wiki.ti.com/index.php/OMAP-L138_Bootloader#After_Reset

However, after I power on, I connect to the DSP and use the debug GEL script and I notice that the DSP did not wake up the ARM. When I manually wake the ARM from a GEL file I can view its registers. If I run any GEL scripts on the ARM core, the ARM seems to go into reset again and I get 0x0BAD0BAD in all of the memory locations. After this, if I run the debug GEL on the DSP core, it says the ARM is powered on. If I try to reconnect to the ARM core after this, CCS crashes and restarts my computer for me (how nice of it...). My suspicion is that the DSP bootloader is bad, or the ARM is being woken up on power up but is going into RESET for some reason. Has anyone seen similar behavior before?

Thanks,

Rob

How do I get a new file into the Audio_SOC_Example make?

Tom Izard — Wed, 22 May 2013 19:59:24 GMT

I have the Audio_SOC_Example up and running (CCS V5.1, Ubuntu 10.4, OMAPL138). I want to add code to the build but when I add a file in the project explorer (I right clicked on the project, selected add files, copy) it appears in the explorer but does not get added to the make, so any references fail during the link. What am I missing? Note: If I click on the added file itself and try to build just the file, CCS complains that there is no rule to make it. But this is true of the existing files too.

Thanks,

Tom

Is a bug of the EDMA3 in omap-138 ? help :)

liang xu — Wed, 22 May 2013 14:58:09 GMT

I'm learning how to move data by EDMA3 of omap-138 DSP, then I find a problem about the Edma3 completed interrupt:

Usually，after edma3 completes, the bit correponding to TCC will appear in reg “IPR”.

However a problem appears : when using omap-138, if the tcc number is same to the channel ID, the transfer and the completed interrupt is OK;

If the tcc number is different to the channel ID, the tranfer is succes, but the completed interrupt is abnormal: DSP can't run to ISR of edma3, and the value of IPR is always 0.

Is there some Bug in edma3 of omap-138? Thanks very much:)

A/D converter to be used with SD Card implementation on OMAP-L138 EVM

Tariq Siddiqui — Thu, 16 May 2013 15:48:02 GMT

Hi Tariq,

I am using OMAP-L138 EVM and looking for ADC that operates over 10 MSPS. It is desirable that given ADC would work with SD card implementation. I am building a data acquisition system which gathers large amount of real-time data to SD card. I know there has been huge multiplexing to OMAP-L138 which doesn't allow many peripheral to be used at the same time. Please advise which ADC would be compatible with OMAPL138 and does allow SD card implementation.

I would really appreciate your help.

Thanks.

-Tariq

How to do PARAM link in EDMA3 using EDMA3LDD [dsp6738]

Ashish Mishra1 — Fri, 10 May 2013 12:55:21 GMT

Can any one please guide me gow to put the PARAM is self link mode in dsp 6738.

Using Linux , i had use function "edma_link(write_dma_chan,write_dma_chan);".

But i am not sure how to do the same in DSP code .

EDMA3CCPaRAMEntry write_paramSet ;

unsigned int retval = 0u;

// Request DMA channel and TCC
retval = EDMA3RequestChannel(SOC_EDMA30CC_0_REGS,write_chType,write_chNum,write_tccNum,write_evtQ);
if (TRUE == retval)
{
// Fill the PaRAM Set with transfer specific information
write_paramSet.srcAddr = (unsigned int)(addr_1_buff);
write_paramSet.destAddr = (unsigned int)(EMIF_CHIP5_BASE + (BRAM_ADDR+OFFSET));
write_paramSet.aCnt = (unsigned short)acnt;
write_paramSet.bCnt = (unsigned short)bcnt;
write_paramSet.cCnt = (unsigned short)ccnt;
write_paramSet.srcBIdx = 0;
write_paramSet.destBIdx = 0;
write_paramSet.srcCIdx = 0;
write_paramSet.destCIdx = 0;

write_paramSet.linkAddr = (unsigned short)0xFFFFu; ---------------??????????????
write_paramSet.bCntReload = 1;
write_paramSet.opt = 0u;
// Src & Dest are in INCR modes
write_paramSet.opt &= 0xFFFFFFFCu;

I want the param to be in a self link so that i preserve un-necessary time being wastage in

initilizing the parameters again and again ....

Thank You,

Ashish Mishra

i tried something like this :-

Resource Conflict error

Kalaiyarasan ES — Fri, 17 May 2013 05:07:35 GMT

Hi,

I am using omapl138 for my project. i am using Ti DVSDK v4.3.0.6. We are using Linux on ARM and DSP Bios v5.41 on DSP, dsplink came with DVSDK.

In my DSP executable, When i place my DSP Code in L2 RAM (start at 0x11808000 ) ,I am facing a run time exception error. When CPU try to execute instruction at the address (0x11808000), DSP processor results in UTL_Halt. I have given screen shot of error below.

Please let me know why i am getting this error. How to overcome this error.

Thanks & regards,

KALAIYARASAN S

ROM Status Code: 0x000000BF

Rob Tice1 — Tue, 21 May 2013 21:20:57 GMT

Hello All,

I am bringing up a custom board based on a OMAP-L138 and am having a few issues connecting via JTAG. I have the unit in Emulation Debug boot mode and have verified this via SYSCFG0 register. When I connect to the ARM it says the processor is Running. When I try to run a GEL file or pause the ARM processor I get the error:

ARM9_0: Trouble Halting Target CPU: Error 0x00000020/-2011 Error during: Execution, An internal error occurred in which an illegal action (0x00000000) was requested while disconnected.

I can successfully connect to the DSP core and run certain parts of GEL files. If I try to change the PLL frequencies I get the error:

Trouble Reading Memory Block at 0xb0000008 on Page 0 of Length 0x4:
Error 0x00000002/-1202
Error during: Memory,

If I select yes and force the processor to stop accessing shared RAM I get the next error:

Trouble Reading Memory Block at 0x1840020 on Page 0 of Length 0x4:
Error 0x00000002/-1060

And then I have to disconnect from the JTAG and restart my computer to reconnect again. When I run a diagnostics test on the C674X I get the following:

C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: | BOOTROM Info |
C674X_0: GEL Output: ---------------------------------------------
C674X_0: GEL Output: ROM ID: d800k176-47-48
C674X_0: GEL Output: Silicon Revision UNKNOWN
C674X_0: GEL Output: Boot pins: 30
C674X_0: GEL Output: Boot Mode: Emulation Debug
C674X_0: GEL Output:
ROM Status Code: 0x000000BF
Description:C674X_0: GEL Output: Error code not recognized

and then the rest of the register status's are printed. I assume there's an issue relating to the UNKNOWN Silicon Revision and the ROM Status code not recognized errors. I would also assume, since I am in JTAG boot mode, that the ARM should not be running and should be sitting in Idle. Any help would be greatly appreciated.

Thanks,

Rob

OMAP-L138 UPP port - receiver and transmitter.

WENBO LI — Tue, 21 May 2013 18:12:20 GMT

Hi,

I would like to use UPP port of OMAP L138 to receive the data from an ADC device. The UPP transmitter won't be used. In this case, I have following questions:

1). While I am using the UPP receiver pins, shall I still be able to use the UPP transmitter pins for GPIO purpose?

2). Because I only use the UPP receiver, I do not need to feed a clock to the UPP_2xTXCLK. Correct? Can I use the UPP_2xTXCLK pin as an GPIO?

3). In order to use the UPP to receive a 16-bit wide data from ADC, I think I must use Channel A (not Channel B) to receive the 16-bit parallel data in format D[0...15]. Correct?

Thank you.

Best regards,

Wenbo

How to Debug DSP core for OMAP-L138

Keldy — Wed, 22 May 2013 02:23:41 GMT

Hi,

I'm using omap-l138 (arm +dsp), i using CCSV4 to write and compile my DSP code while i'm using wind river (VxWork) to compile ARM code.

after i compile my DSP in CCSV4, i'll copy DSP image to VxWork folder to compile, VxWork will load the DSP image after booting up ARM.

Since i using two different IDE, how i debug DSP code using JTAG?

Or is there anywhere to use printf() inside DSP code to output something to UART terminal ?

Thanks

Keldy

EDMA3 Channel Controller 0 UART2 Transmit

Chris Davis1 — Mon, 29 Apr 2013 14:37:05 GMT

Hi,

Per: http://www.ti.com/lit/ds/symlink/omap-l138.pdf

Table 5-14, page 108.

I'm trying to run UART2 in DMA mode but there is no event # for UART2 Transmit. Is it possible to set UART2 into DMA mode? Is the blank event 31 UART2 Transmit?

Thanks

Chris

davinci arago recipe query

Manish Vishwanathrao Badarkhe — Sun, 12 May 2013 17:09:07 GMT

(Please visit the site to view this file)

Hi All

I am facing issue while building arago recipe for da830-omapl137-evm.

I have u-boot and kernel bb file for da830-omapl137-evm. Following below steps in order to build setup for da830-evm.

Case 1.

Build steps:

a. Followed a link http://www.arago-project.org/wiki/index.php/Setting_Up_Build_Environment in order to make arago recipe setup

b. Use command MACHINE=da830-omapl137-evm bitbake -b arago/recipes/linux/linux-davinci_3.3.0-psp03.22.00.02.bb
to build a recipe for linux.

Result:

Build get stops while cloning source code for linux kernel but if I do explicit cloning its working fine.

Case 2:

Build steps:

a. Followed a link http://www.arago-project.org/wiki/index.php/Setting_Up_Build_Environment in order to make arago recipe setup

b. Use command:MACHINE=da830-omapl137-evm bitbake virtual/kernel to build a recipe for linux

Results:

Build takes wrong bb file for compilation and hence unable to create proper images for linux.

Please let me know whether Case 1 or Case 2 is proper to build kernel using arago recipe. If Case 1 is proper then how I can make clone to work fine?

If case 2 is proper then what change is required to pick proper bb file?

Please see attached .tar for bb files.

Thanks

Manish Badarkhe

C6748 LCDK kit

Madhu Vatte — Tue, 21 May 2013 18:55:03 GMT

Hello,

We have the C6748 (LCDK) kit and was going to start playing with that. The problem we are running into is access to all the GPIOs that we need to use. If there is a version of DSP evaluation kit in a similar family that gave us easy access to the GPIOs and other peripherals (PWMs, SPI buses, etc.) it would be much more conducive for our development. We did not find any other kits on TI website. Are there any third party companies which have the kits based on C6748 with more GPIO access?

Thanks

Madhu