I need a little clarification on the layout guidelines for ADDR_CTRL to ADDR_CTRL which shows a skew length
mismatch of 100mils max for the AM1808. This seems like a very tight tolerance for DDR running at 150MHz (would expect
it to be more like 500mils). Is additional data available or has anyone see it work with 500mils?
Sonya, your particular board may or may not work with looser skew tolerances, but TI can only guarantee operation if all specifications are followed.
Jeff
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Useful Links:OMAP-L1x/C674x/AM18x Debug GEL File