Dear All,
We have our own customized board where we are using omap-l138 with mDDR MT46H128M16LFCK-6:A.
But we are facing a problem in proper reading of DRAM in u-boot.
We are using 256MB of mDDR but we get value in u-boot of 128MB.Following is the debug at u-boot prompt:
We have also gone through the arm ubl of 1.65 version. Where we have made change in th SDCR register i.e. page size set 2048 and IBANK set 4 banks, as per our mDDR settings.
Please do correct where we are going wrong and for more info just reply the post.
OMAP-L138 initialization passed!Booting TI User Boot Loader UBL Version: 1.65Device OPP (300MHz, 1.2V) UBL Flashtype: SPI Starting SPI Memory Copy...Valid magicnum, 0x55424CBB, found at offset 0x00010000. DONEJumping to entry point at 0xC1080000.MMC: davinci: 0SF: Detected M25P64 with page size 256, total 8 MiB*** Warning - bad CRC, using default environmentIn: serialOut: serialErr: serialARM Clock : 300000000 HzDDR Clock : 132000000 HzRAM Configuration:Bank #0: c0000000 128 MiBRAM size: 8000000SF: Detected M25P64 with page size 256, total 8 MiB
Regards
Rishabh Jain
I don't think that this version auto detect mem size. Have you modified the line
#define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 64MB */
in the file /u-boot<version>/include/configs/da850evm.h to reflect the new memory size?
Hi Rishabh,
If you are using the DSP side as well, the memory is shared and the memory map needs to be adjusted. If you are using DSPLink for DSP and ARM communication, please see:
http://processors.wiki.ti.com/index.php/Changing_DSPLink_Memory_Map
- Mariana
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Loc I don't think that this version auto detect mem size. Have you modified the line #define PHYS_SDRAM_1_SIZE (64 << 20) /* SDRAM size 64MB */
We already change it to 256MB in our board header file da850evm.h
#define PHYS_SDRAM_1_SIZE (256 << 20) /* SDRAM size changed to 256MB */
But it is not effecting anything.
Please correct us if we are going wrong as we can see the dram registers are configured in ubl itself.
We have changed the configuration in SDCR register, earlier its value was - 0x08934832 - new value - 0x08934823.
pagesize - 2048 and banks 4 according to datasheet.
According to our analysis it uses "get_ram_size" function called by "dram_init" function from board.c file.
Can you provide your DDR clock frequency setting and the values programmed into DRPYC1R, SDCR, SDCR2, SDTIMR1, SDTIMR2 and SDRCR registers please?
Best regards,
Adam
We are getting DDR clock = 132 Mhz.
After setting the following values we are able to get DRAM size = 256MB.
DRPYC1R = 0x000000C4,
SDCR = 0x0A034623,
SDTIMR1 = 0x184929CB,
SDTIMR2 = 0x380FC700,
SDRCR = 0x00000406,
SDCR2 = 0x00000000.
Debug is:
ARM Clock : 300000000 Hz
DDR Clock : 132000000 Hz RAM Configuration: Bank #0: c0000000 256 MiB RAM size: 10000000
But after setting some variables in u-boot our u-boot hangs after some times.
So please correct what may be the reason of hanging of u-boot.
We think that there might be some Clock mis-match due to which it gets hangs.