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PCM4204EVM and OMAP L138 TMS320C6748 configuration

Other Parts Discussed in Thread: TMS320C6748, PCM4204EVM

Hello!

I have problem with proper configuration of ADC PCM4204EVM with board OMAP L138 TMS320C6748. I use McASP port and RDATA interrupt.

My McASP configuration:
MCASP->RMASK = 0xFFFFFFFF; // all 32-bits NOT masked
MCASP->RFMT = 0x000180F8; // MSB first, align left, slot=32bits, 1-bit delay, ROR 0-bits
MCASP->AFSRCTL = 0x00000111; // external generated, FS/word, 2 SLOT TDM = I2S, falling edge start frame
MCASP->ACLKRCTL = 0x000000A3;
MCASP->AHCLKRCTL = 0x00000000; // rising edge, clkrm external, HCLKRDIV = 256
MCASP->RTDM = 0x00000003; // SLOT 0 & 1 active I2S
MCASP->RINTCTL = 0x00000000; // ints disabled (enabled later though)
MCASP->RCLKCHK = 0x00FF0000; // RMAX = FF, RPS = /1 - McASP system clock divided by 1
MCASP->SRCTL12 = 0x000E; // RCV
// config pin function and direction.
MCASP->PFUNC = 0; //all Pins functions as McASP pins.
MCASP->PDIR = 0x1C000800;
MCASP->DITCTL = 0x00000000;
MCASP->DLBCTL = 0x00000000;
MCASP->AMUTE = 0x00000000;

PCM's configuration:
- 24bit I2S
- 96kHz dual sampling mode (long frame)
- 2 channels
- Sub-frame 0

My isr function:
if(CHKBIT(MCASP->SRCTL12, RRDY)) {
dataIn32 = MCASP->RBUF12;
bigBuf2[blkCnt2] = dataIn32;
blkCnt2++;}


I expected data like: 1a,1b,2a,2b,.... but I get sth like: 1a,2a,.....,96a,1b,2b,...,95b,1a,2a,.....,96a,...
where 1a - is sample from channel A, 1b - is sample from channel 2.

If I change configurafion of McASP to 4 channels, I get samples from only channel A but with doubly reduced sampling frequency.

  • Problem is solved. In the debug version (without any optimization) time of interrupts from PCM was too long.

  • Hi Piotr,

    I have the same problem you had trying to receive I2S data via interrupt. I have an overrun error.

    I'm in debug mode like you so: did you solved only passing in release mode? or is there a way to compile code in an optimized manner also in debug mode in order to reduce time of interrupts?

    Can you kindly show me your interrupt service routine?

    I cannot understand when I have to clear interrupt request (at the beginning or at the end of ISR) and how manage RSTAT register.

    Kind Regards,

    Paolo