Why is TI not providing SRST for 14 pins JTAG

Hi Laszlo,

The SRST signal isn’t needed and can be left unconnected .You can check this link for more details regarding JTAG pin connections

http://processors.wiki.ti.com/index.php/XDS_Target_Connection_Guide#Target_Connection_Design

Which processor are you using?

Regards

Antony

Hi Antony,

thank you for your reply. What do you mean by not needed? I would like to use that pin for resetting the whole board automatically after flashing via JTAG. The jtag software should be accessing a jtag pin which can reset the whole board.

Is there any other way than SRST, or what do you mean by not needed? Sorry if I had been vague with my inquiry.

I am using OMAP-L138.

Thanks again.

Hi Laszlo,

Which processor are you using?

SRST is the System Reset (Emulation) signal. If tied to the card or device reset line, it allows the debugger to control the reset of the device. For some devices, when debugging boot code the Wait in Reset may use this signal. See System Reset (Emulation) for details on how to use this feature in Code Composer Studio v4.

http://processors.wiki.ti.com/index.php/Wait_in_Reset

http://processors.wiki.ti.com/index.php/System_Reset_(Emulation)

Please find the similar kind of the post regading SRST signal

http://e2e.ti.com/support/arm/sitara_arm/f/791/t/227497.aspx

Regards

Antony

Antony, I am using OMAP-L138, but I know which the reset line is. The problem is that you cannot connect to any jtag pin when having 14 pins. It is only the 15th pin for 20-pin jtag adapters.

If someone has a board with 14 pins, it would be a major redesign to get an SRST signal possible over the jtag adapter. Hence, my question is why does TI not support it for 14-pin?

I would like to be able to reset the whole board with JTAG.

Hi Laszlo,

Please post this question to Emulation forum to get further response on this …. But It’s solely depends upon the emulator manufacturer to support this feature on 14-Pin or 20-pin

http://e2e.ti.com/support/development_tools/code_composer_studio/f/81.aspx

Some boards don’t wire SRST to the JTAG connector. Some JTAG adapters don’t support such signals even if they are wired up.

Sometimes a chip, board, or adapter will connect SRST to TRST, instead of keeping them separate

Some chips have specific ways the TRST and SRST signals are managed. In the unusual Case that these are chip specific and can never be changed by board wiring.

Regards

Antony

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Thanks Antony.

I was wondering in my initial question why TI does not wire up SRST for the 14-pin, just only for the 20-pin jtags.

Also, please note that, I am not using Code Composer Studio, nor emulation. I am just trying to get a reset led by the jtag SRST pin through an open source cross-platform software, called "openocd".

The problem is that if I cannot trigger system reset, people will need to manually push reset buttons, etc, so the automation gets broken for production, etc.

Papp,

The SRST pin was first time introduced during the 20-pin jtag header was defined. At the time, the 14-pin jtag header was considered to be obsoleted soon. 

Yes, the intention of this SRST pin is for user to be able to issue an reset to reset as much as possible of the entire system (the boards) via a debugger connection. 

This is design dependent, and the board designer will decide what the reset will reset on the board, and implemente the appropriate control correctly.

If you use TI's tools (CCS), there is a command line command to generate a PULSE on the SRST pin, so that, the on-board logics (circuit) to see this pulse and generate a reset sequence appropriately. 

Regards!

Wen

Thanks Wenzhong.

I believe that command cannot be used without an SRST jtag pin. We need to live with the 14-pin, so  there is no chance for us, I guess, but I was still wondering why it happened the way it did.

If I understand you correctly, this is historical then. I wonder if there is a workaround to still issue a reset somehow without JTAG srst omap-l138 soc direct reset connection?

Papp,

Yes, this is a historical reason as I have mentioned.

You said -- you are not using CCCS, nor TI's emulation. I am just trying to get a reset led by the jtag SRST pin through an open source cross-platform software, called "openocd".

In that case, I'd suggest you re-define the pin[6] of the 14-pin header <the KEY> as the SRST, and let your tools (SW and emulator) to manage it accordingly. This pin is un-used in 14-pin header.

Regards!

Wen

Ah, ok, thanks.

Do you know if this pin-6 (KEY) is connected to the ftdi chip with open drain state?

I am not sure if the xds100v2 schematics is available without NDA, or whether that is enough to figure this out?

Papp,

xds100v2 schematics shows that the PIN-6 is not connected to anything on either 14-pin header or 20-pin header. It is safe to use.

Regards!

Wen 

How could a jtag software handle it without ftdi connection then? I meant to ask whether inside the jtag adapter, it is connected to the ftdi chip in some way.

If it is not, I am not sure how this could be used for jtag purposes. Hopefully, my question is clear this time. AFAIK, the jtag softwares use the ftdi chip inside to control the pins, but I may be wrong.

Do you know if the full schematic is available somewhere and if I can obtain it somehow to check all this?

TI's SW doesn't use this PIN (the KEY), and it is not connected to any circuit.

The original purpose of this PIN-6, is to provide orientation to ensure users will connect the emulator cable  to the emulation header on a board correctly. That is why it has the name "KEY".

If you check a board built by TI, you will see that:
       a.  On the header (the board) side, the pin-6 is "CUT" off from the header.
       b.  On the cable side, the pin-6 is stuffed.

In this way, user won't connect the cable to the header in a wrong way. In other word, this pin-6, is not used ELECTRICALLY, but mechanically providing the orientation information.

Regards!
Wen

Yes, we also have the pin cut off on the header, and stuffed on the adapter side, but what I really need is a controllable PIN on the jtag by software. That is, I would like to trigger a board reset by the jtag software.

TI currently makes this impossible with the 14-pin jtag adapters, while it is possible with ARM jtag adapters. Due to the TI jtag adapters being different, we cannot easily switch to ARM jtag adapters.

Anyway, let me know if you know any other way how we could trigger a system reset other than maybe watchdog.

Papp,

Can you provide more info what you are doing (other than you want to generate a system reset)?

Are you working with an existing board with a 14-pin header as well as the XDS100v2 on it? Then, there is no work-around other than, redesign it.

Or, are you going to design a board with OMPA-L138 and want to use TI's design of the 14-pin header on your board (I understand that, you are not going to use TI's emulator/cable), then you can do what ever you want to do. Ex, don't cut the pin-6, so that your tools (SW and emulator) can control it.

If you are using TI's emulator and CCS, CCS can issue an system reset, which will reset the device (OMAP-L138, but not the entire board). This reset cmd is not by toggling the reset pin, instead, CCS writes to the control registers inside the device.

Regards!
Wen

1) I do not use CCS as stated above.

2) I have a board with a 14-pin header (pin-6 cut off, but that could be fixed in the future and by soldering for existing boards).

3) I have an external XDS100v2 which I plug onto the header with a cable where the pin-6 is stuffed.

4) In an ideal world, we could redesign the board, and buy 20-pin adapters, but this is far from the reality, very far.

5) I am interested in getting reset for the whole board after flashing a boot loader to get the bootloader started automatically.

etc.

We will not redesign the board the next 5-10 years, but then again: who knows.. not for now anyways. :-)

I think I will take a look into watchdog then if that can still be any of help to reset the board automatically after flashing. If not, we need to try a different method.

Thank you for your answers anyhow!

Could we use the 21 pin of the cpls (R21) which seems to be where the SRST happens to be?

http://software-dl.ti.com/dsps/dsps_registered_sw/sdo_ccstudio/XDS/XDS100v2Schematic(rev2)-Setup.zip

(too bad the schematics is not available for non-windows though)

What do you want to do with this CPLS-R21?

If you have TI's external XDS100v2 emulator, and you have the 20-pin cable, the SRST signal is its PIN-15. Why don't  you use this PIN directly (wired it to your board for this function).

BUT, what really missing here is, your board might not have the logic designed in (the FPGA as I mentioned above) yet to mointor this signal and to generate the desired reset sequence (for a safe and clean reset).

Regards!
Wen