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Please interpret interrupt in EDMA uart API

Hi,

I want to use DMA mode with Uart on DSP C674x on L138 LCDK board. I use biospsp_03.00.01.00 package now. On the User Guide Page 32/228, it has the explanation:

2.4.5 DMA Interrupt Mode
The configurations required for DMA Interrupt mode of operation are:
Instance configuration opMode should be set to Uart_OpMode_DMAINTERRUPT.
Additionally the hwiNumber assigned by the application for the UART CPU events
group should be passed, so that the driver can enable proper interrupts. Also, as part
of chanParams, the handle to the EDMA driver, hEdma, should be passed by the
application.

It seems that the interrupt is from Uart, not from EDMA transmission finished which I expected. Is it true?

Could you explain it to me the steps involved? What can I do with Uart interrupt with EDMA transmission?

Thanks,

  • Robert,

    I went ahead and moved this thread over to the device forum so that hopefully someone familiar with the BIOSPSP can answer your question.

  • Hi,

    Thanks for your post.

    What you mean is correct, it seems the interrupt is from UART and not for EDMA transfer completion interrupt.

    In order to interpret the EDMA interrupts through UART API functions, you have to refer both the source files Uart.c & Uart_edma.c from the below path:

    ~\Texas Instruments\pdk_C6748_2_0_0_0\biospsp_03_00_01_00\drivers\uart\src

    First you have to initialize the UART peripheral through Uart_init(), after which, you have to set the appropriate Uart params and accordingly, one of the parameter opMode should be set as "uartParams.opMode = Uart_OpMode_DMAINTERRUPT". May be, you could refer the Uart param initialization in the "uartSample_main.c" from the below path:

    ~\Texas Instruments\pdk_C6748_2_0_0_0\biospsp_03_00_01_00\drivers\examples\evm6748\uart\src

    From the above source, you could see the Uart params initialization as below:

    uartParams = Uart_PARAMS;
    uartParams.opMode = Uart_OpMode_POLLED; (change it to  Uart_OpMode_DMAINTERRUPT)
    uartParams.baudRate = Uart_BaudRate_115_2K;
    uartParams.hwiNumber = 9;
    uartParams.rxThreshold = Uart_RxTrigLvl_1;
    uartParams.softTxFifoThreshold = 1;

    After Uart initialization, please check the Uart.c source file and search for two Uart driver API functions "uartSubmitIoReqIntDma" & 'Uart_loadPendedIops" in which, you could see the below code snippet from both API's to enable line status interrupt in case of DMA mode:

    Void Uart_loadPendedIops(Uart_ChanObj *chanHandle)
    {

    ...............

    ..............

    if (Uart_OpMode_DMAINTERRUPT == instHandle->opMode)
    {
    Uart_localStartEdmaTransfer(chanHandle,ioPacket->cmd);
    }

    ..................

    }

    static Int32 uartSubmitIoReqIntDma(Uart_ChanObj *chanHandle,IOM_Packet *ioPacket,UInt32 key)

    {

    ..........

    ..........

    if (Uart_OpMode_DMAINTERRUPT == instHandle->opMode)
            {
                /* If DMA mode then start the DMA                                 */
                retVal = Uart_localStartEdmaTransfer(
                            chanHandle,
                            (UInt32)ioPacket->cmd);
    
                if  (IOM_COMPLETED == retVal)
                {
                    retVal = IOM_PENDING;
                }
            }
            retVal  = IOM_PENDING;
    
            /* enable interrupt                                                   */
            if (Uart_OpMode_DMAINTERRUPT != instHandle->opMode)
            {
                if (Uart_INPUT == chanHandle->mode)
                {
                    uartIntrEnable(chanHandle->devHandle,(UInt32)Uart_Intr_RHR);
                }
                else
                {
                    uartIntrEnable(chanHandle->devHandle,(UInt32)Uart_Intr_THR);
                }
            }
            else
            {
                /* In case of DMA mode enable line status interrupt only to handle*
                 * RX errors                                                      */
                uartIntrEnable(chanHandle->devHandle,CSL_UART_IER_ELSI_MASK);
            }

    .............

    .............

    }

    Again, you have to check for the "Uart_localStartEdmaTransfer" API function in Uart_edma.c source file in the "~\Texas Instruments\pdk_C6748_2_0_0_0\biospsp_03_00_01_00\drivers\uart\src" path. Using this API, you can start the EDMA Tx. & Rx. transfer for the Uart peripheral through IOM commands like "uartStartEdmaRxTransfer" & 'uartStartEdmaTxTransfer" and please check the code snippet for the same in Uart_edma.c as below:

    Int32 Uart_localStartEdmaTransfer(Uart_ChanObj *chanHandle, UInt32 cmd)
    {
        Int32      retVal        = IOM_COMPLETED;
    
        assert(NULL != chanHandle);
    
        chanHandle->ioCompleted = FALSE;
    
        if (IOM_READ == cmd)
        {
            retVal = uartStartEdmaRxTransfer(chanHandle);
        }
        else if (IOM_WRITE == cmd)
        {
            retVal = uartStartEdmaTxTransfer(chanHandle);
        }
        else
        {
            retVal = IOM_ENOTIMPL;
        }
    
        return retVal;
    }

    Thanks & regards,

    Sivaraj 

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  • Thank for your detailed explanation. After reading another relevant post and Uart manual, I still have one question left. For Uart receiving, when Uart Interrupt activated, EDMA may not finished transfer receiving data to destination memory(?). The user should check some EDMA status (I am new to EDMA, do not know what registers can do this work)? Please clarify my questions.

  • Hi,

    Thanks for your update.

    I would recommend you to enable the EDMA3CC error interrupt in the device controller and attach an interrupt service routine (ISR) to ensure that error conditions are not missed in an application and are appropriately addressed with the ISR.

    If the interrupts are enabled, then the EDMA3CC generates a completion interrupt to the CPU whenever transfer completion results in setting the corresponding bits in the interrupt pending register (IPR). The set bits must be cleared in IPR by writing to the corresponding bit in ICR.

    If polling for completion where interrupts not enabled in the device controller, then the application code can wait on the expected bits to be set in IPR. Again, the set bits in IPR must be manually cleared by writing to ICR before the next set of transfers is performed for the same transfer completion code values.

    For more details on debug checklist & tips, please refer sections 18.5.1 & 18.5.2 in the OMAPLl138 TRM as below:

    http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf

    Thanks & regards,

    Sivaraj K

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