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For interrupt timing of C6748 VPIF module

M.H
Genius 5960 points

Hi,

Please tell us about the timing of the frame interrupt C6748 VPIF module.

 

There is a description of the two following 34.2.12.2.1 Interrupt Condition Technical Reference Manual (SPRUH79A).

 

(1) The VPIF generates the following events as conditions for interrupt assertion:

In normal YC receive / transmit mode, EAV on line L1 (and EAV on line L7 in field interrupt for bottom field). Both L1 and L7 are described in Figure 34-4 and Figure 34-5.

 

(2) The interrupt signal from the VPIF is asserted when the vertical synchronization signal is received.

 

In the case of (1), Frame interrupt occurs at the timing of the L1 or L7

In the case of (2), When it receives a vertical sync signal, and generating an interrupt

It has been interpreted as, but either (1) and (2) is correct?

 

Best Regards,

hamada

  • 0
    TI__Mastermind 35645 points

    Hi Hamada,

    Thanks for your post.

    With interrupt assertion context from VPIF, your interpretation of Case (1) and Case (2) is correct, but actually the first interrupt from VPIF which is actually the indication for the beginning of a frame/field and in this context, the scenario would differ across different function modes (normal YC rx/tx. mode & CCD capture mode) because of the vertical synchronization signal. When VPIF starts capturing incoming picture data, the interrupt signal from VPIF would be asserted when you receive vertical synchronization signal and immediately, there would be no incoming data being written in memory when the first interrupt is asserted from VPIF and here, the first frame interrupt happens only after frame[n] which is actually at the 2nd frame interrupt, now there is no vertical synchronization signal since it starts capturing the incoming data only at the 2nd frame interrupt.

    From the above point, the first frame interrupt from VPIF (indicates the beginning of a frame/field) would vary when in the case of vertical synchronization signal when VPIF captures incoming data. In this case, the first frame interrupt happens actually at 2nd frame interrupt. For more details, please check Fig. 34-15 & 34-16 to understand the relationship between first interrupt & incoming data and first interrupt & outgoing data. Please check the C6748 TRM as below:

    http://www.ti.com/lit/ug/spruh79a/spruh79a.pdf

    Thanks & regards,

    Sivaraj K

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