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Can TI (or anyone) provide a BFM (Bus Functional Model) for the EMIF interface?

Other Parts Discussed in Thread: OMAPL138

I saw a 5-year old thread that said TI usually doesn't provide VHDL / Verilog / SystemC models, but it sure would make the job of designing in their processors a bit easier, hint-hint...  ;)

We're designing with a 6748 (or alternately, an OMAPL138 with 6748) and I don't have software or a dev board at this point, but need to sanity-check some bus transactions that were not clear in the docs.

Separate posts coming with those specific questions, but if TI provides a reference model I can simulate, that would answer all of them.

If other customers/users have written models that can be shared (for any flavor of the EMIF), I wouldn't mind taking a look.

Many thanks!