How to configure a leopard Imaging and LCDK6748

Hi,

Thanks for your post.

In my opinion, you have to add more supporting modes in vpif.h to support HD resolution and as of now, it is supporting NTSC SD resolution and you will see "VPIF_480I" macro in vpif.h, like wise, you have to add more supporting modes for other input capture resolution as per TRM specification, thereby, it should be passed as an parameter to the "VPIFCaptureModeConfig()' function like as below:

VPIFCaptureModeConfig(SOC_VPIF_0_REGS, VPIF_480I, VPIF_CHANNEL_0, 0, (struct vbufParam *) 0);

Again, appropriately, the below macro should be modified accordingly to the input capture resolution;

#define CAPTURE_IMAGE_WIDTH (720)
#define CAPTURE_IMAGE_HEIGHT (488)

The only function which we require modification should be at the initialize capture which is through "SetUpVPIFRx()" function to support the HD input resolution.

The CAPMODE bit of the C0CTRL and C1CTRL control registers determines what data format will be captured by VPIF. The BT/YC video mode will look for video sync signals that are embedded within the video byte stream (standard for BT video). The CCD/CMOS (Raw Data Capture) mode will look for video sync signals on the dedicated VPIF sync pins (common for CCD and CMOS sensors). For more details on this, please look into the TRM.

Other than this, I don't think, we require additional changes to support input capture resolution.

Thanks & regards,

Sivaraj K

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Hello

Can you tell me where I can find the macro of BT/YC video mode?? I saw the TRM but it has not any code.

Thank you

Kind Regards

I found the code of the function and I add the mode as VPIF_HD. I tried to debug but the screen is still blank.

void VPIFCaptureModeConfig(unsigned int baseAddr, unsigned int mode, unsigned int sdChannel, unsigned int rawWidth, VPIFVbufParam* buf)
{ /*
typedef struct vbufParam
{
unsigned int sav2eav;
unsigned int eav2sav;
unsigned int vsize;
unsigned int l1;
unsigned int l3;
unsigned int l5;
unsigned int l7;
unsigned int l9;
unsigned int l11;
} VPIFVbufParam;
*/
if(mode==VPIF_480I)
{
if(sdChannel==VPIF_CHANNEL_0)
{
HWREG(baseAddr + C0HCFG) = (268 << VPIF_C0HCFG_EAV2SAV_SHIFT) | (1440 << VPIF_C0HCFG_SAV2EAV_SHIFT);
HWREG(baseAddr + C0VCFG0) = (4 << VPIF_C0VCFG0_L1_SHIFT) | (20 << VPIF_C0VCFG0_L3_SHIFT);
HWREG(baseAddr + C0VCFG1) = (264 << VPIF_C0VCFG1_L5_SHIFT) | (266 << VPIF_C0VCFG1_L7_SHIFT);
HWREG(baseAddr + C0VCFG2) = (283 << VPIF_C0VCFG2_L9_SHIFT) | (1 << VPIF_C0VCFG2_L11_SHIFT);
HWREG(baseAddr + C0VSIZE) = 525 << VPIF_C0VSIZE_VSIZE_SHIFT;
}
if(sdChannel==VPIF_CHANNEL_1)
{
HWREG(baseAddr + C1HCFG) = (268 << VPIF_C1HCFG_EAV2SAV_SHIFT) | (1440 << VPIF_C1HCFG_SAV2EAV_SHIFT);
HWREG(baseAddr + C1VCFG0) = (4 << VPIF_C1VCFG0_L1_SHIFT) | (20 << VPIF_C1VCFG0_L3_SHIFT);
HWREG(baseAddr + C1VCFG1) = (264 << VPIF_C1VCFG1_L5_SHIFT) | (266 << VPIF_C1VCFG1_L7_SHIFT);
HWREG(baseAddr + C1VCFG2) = (283 << VPIF_C1VCFG2_L9_SHIFT) | (1 << VPIF_C1VCFG2_L11_SHIFT);
HWREG(baseAddr + C1VSIZE) = 525 << VPIF_C1VSIZE_VSIZE_SHIFT;
}
}
if(mode==VPIF_HD)
{
if(sdChannel==VPIF_CHANNEL_0)
{
HWREG(baseAddr + C0HCFG) = (272 << VPIF_C0HCFG_EAV2SAV_SHIFT) | (1920 << VPIF_C0HCFG_SAV2EAV_SHIFT);
HWREG(baseAddr + C0VCFG0) = (1 << VPIF_C0VCFG0_L1_SHIFT) | (42 << VPIF_C0VCFG0_L3_SHIFT);
HWREG(baseAddr + C0VCFG1) = (1122 << VPIF_C0VCFG1_L5_SHIFT) | (564 << VPIF_C0VCFG1_L7_SHIFT);
HWREG(baseAddr + C0VCFG2) = (603 << VPIF_C0VCFG2_L9_SHIFT) | (1121 << VPIF_C0VCFG2_L11_SHIFT);
HWREG(baseAddr + C0VSIZE) = 1125 << VPIF_C0VSIZE_VSIZE_SHIFT;
}
if(sdChannel==VPIF_CHANNEL_1)
{
HWREG(baseAddr + C0HCFG) = (272 << VPIF_C0HCFG_EAV2SAV_SHIFT) | (1920 << VPIF_C0HCFG_SAV2EAV_SHIFT);
HWREG(baseAddr + C0VCFG0) = (1 << VPIF_C0VCFG0_L1_SHIFT) | (42 << VPIF_C0VCFG0_L3_SHIFT);
HWREG(baseAddr + C0VCFG1) = (1122 << VPIF_C0VCFG1_L5_SHIFT) | (564 << VPIF_C0VCFG1_L7_SHIFT);
HWREG(baseAddr + C0VCFG2) = (603 << VPIF_C0VCFG2_L9_SHIFT) | (1121 << VPIF_C0VCFG2_L11_SHIFT);
HWREG(baseAddr + C0VSIZE) = 1125 << VPIF_C0VSIZE_VSIZE_SHIFT;
}
}
if(mode==VPIF_CAPTURE_RAW)
{
/* TBD */
}
if(mode==VPIF_NONSTANDARD)
{
/* TBD */
if(sdChannel==VPIF_CHANNEL_0);
if(sdChannel==VPIF_CHANNEL_1);
}

/* TBD */
}

I added the mode VPIF_HD. Is the code correct??

void VPIFCaptureModeConfig(unsigned int baseAddr, unsigned int mode, unsigned int sdChannel, unsigned int rawWidth, VPIFVbufParam* buf)
{ /*
typedef struct vbufParam
{
unsigned int sav2eav;
unsigned int eav2sav;
unsigned int vsize;
unsigned int l1;
unsigned int l3;
unsigned int l5;
unsigned int l7;
unsigned int l9;
unsigned int l11;
} VPIFVbufParam;
*/
if(mode==VPIF_480I)
{
if(sdChannel==VPIF_CHANNEL_0)
{
HWREG(baseAddr + C0HCFG) = (268 << VPIF_C0HCFG_EAV2SAV_SHIFT) | (1440 << VPIF_C0HCFG_SAV2EAV_SHIFT);
HWREG(baseAddr + C0VCFG0) = (4 << VPIF_C0VCFG0_L1_SHIFT) | (20 << VPIF_C0VCFG0_L3_SHIFT);
HWREG(baseAddr + C0VCFG1) = (264 << VPIF_C0VCFG1_L5_SHIFT) | (266 << VPIF_C0VCFG1_L7_SHIFT);
HWREG(baseAddr + C0VCFG2) = (283 << VPIF_C0VCFG2_L9_SHIFT) | (1 << VPIF_C0VCFG2_L11_SHIFT);
HWREG(baseAddr + C0VSIZE) = 525 << VPIF_C0VSIZE_VSIZE_SHIFT;
}
if(sdChannel==VPIF_CHANNEL_1)
{
HWREG(baseAddr + C1HCFG) = (268 << VPIF_C1HCFG_EAV2SAV_SHIFT) | (1440 << VPIF_C1HCFG_SAV2EAV_SHIFT);
HWREG(baseAddr + C1VCFG0) = (4 << VPIF_C1VCFG0_L1_SHIFT) | (20 << VPIF_C1VCFG0_L3_SHIFT);
HWREG(baseAddr + C1VCFG1) = (264 << VPIF_C1VCFG1_L5_SHIFT) | (266 << VPIF_C1VCFG1_L7_SHIFT);
HWREG(baseAddr + C1VCFG2) = (283 << VPIF_C1VCFG2_L9_SHIFT) | (1 << VPIF_C1VCFG2_L11_SHIFT);
HWREG(baseAddr + C1VSIZE) = 525 << VPIF_C1VSIZE_VSIZE_SHIFT;
}
}
if(mode==VPIF_HD)
{
if(sdChannel==VPIF_CHANNEL_0)
{
HWREG(baseAddr + C0HCFG) = (272 << VPIF_C0HCFG_EAV2SAV_SHIFT) | (1920 << VPIF_C0HCFG_SAV2EAV_SHIFT);
HWREG(baseAddr + C0VCFG0) = (1 << VPIF_C0VCFG0_L1_SHIFT) | (42 << VPIF_C0VCFG0_L3_SHIFT);
HWREG(baseAddr + C0VCFG1) = (1122 << VPIF_C0VCFG1_L5_SHIFT) | (564 << VPIF_C0VCFG1_L7_SHIFT);
HWREG(baseAddr + C0VCFG2) = (603 << VPIF_C0VCFG2_L9_SHIFT) | (1121 << VPIF_C0VCFG2_L11_SHIFT);
HWREG(baseAddr + C0VSIZE) = 1125 << VPIF_C0VSIZE_VSIZE_SHIFT;
}
if(sdChannel==VPIF_CHANNEL_1)
{
HWREG(baseAddr + C0HCFG) = (272 << VPIF_C0HCFG_EAV2SAV_SHIFT) | (1920 << VPIF_C0HCFG_SAV2EAV_SHIFT);
HWREG(baseAddr + C0VCFG0) = (1 << VPIF_C0VCFG0_L1_SHIFT) | (42 << VPIF_C0VCFG0_L3_SHIFT);
HWREG(baseAddr + C0VCFG1) = (1122 << VPIF_C0VCFG1_L5_SHIFT) | (564 << VPIF_C0VCFG1_L7_SHIFT);
HWREG(baseAddr + C0VCFG2) = (603 << VPIF_C0VCFG2_L9_SHIFT) | (1121 << VPIF_C0VCFG2_L11_SHIFT);
HWREG(baseAddr + C0VSIZE) = 1125 << VPIF_C0VSIZE_VSIZE_SHIFT;
}

}

if(mode==VPIF_CAPTURE_RAW)
{
/* TBD */
}
if(mode==VPIF_NONSTANDARD)
{
/* TBD */
if(sdChannel==VPIF_CHANNEL_0);
if(sdChannel==VPIF_CHANNEL_1);
}

/* TBD */
}

Any idea?

Does anyone know anything about this??

Thank you

Kind Regards

I have just change the clock.

Now the screen is still blank and it shows the next message:

It can not submit this mode. Optimal resolution 1280x1024. 60Hz

I have change the VPIFCaptureModeConfig, the clock and the pixel resolution. 

Do I need to change more parameters??

Thank you

Kind regards

Any help??

Thank you

Kind regards

Please any help??

Thank you

Hi Javi,

It can not submit this mode. Optimal resolution 1280x1024. 60Hz

I have change the VPIFCaptureModeConfig, the clock and the pixel resolution.

Are you getting any error while running the code ?

Please read the chapter 24 of C6748 TRM throughly and cross check that you have done for RASTER configuration.