OD1EN in OSCDIV register

Hi Keigo Ishii,

Have you set the bit "OBSEN" in "CKEN" register ?

Could you please tell what you are trying to do ?

Also elaborate a bit on your requirement.

Hello Keigo,

First, to enable the PLLC0 OBSCLK output, you have to set the bit OD1EN in OSCDIV register and OBSEN bit in CKEN register.

The selection in OCSEL[OCSRC] register routes the corresponding SYSCLK to OBSCLK through OSCDIV.

The selected SYSCLK is divided by the value in OSCDIV (ratio+1) and comes out at PLLC0 OBSCLK (CLKOUT pin).

Regards,

Senthil  

Hi Titus,

Yes, I have set 1(enable) to OBSEN bit in CKEN register.

I think my customer will ask me about OD1EN, so I need to know to explain for him about it.

OD1EN is described as follows in the TRM.
0 : Oscillator divider 1 is disabled.
1 : Oscillator divider 1 is enabled.
    For OBSCLK to toggle, both the OD1EN bit and the OBSEN bit in the clock enable control register (CKEN) must be set to 1.

What does "disabled" mean? Not output the clock? Bypass the divider?

Best regards,
Keigo Ishii

Hello Keigo,

When the OD1EN is disabled, you will not get the output clock at PLL0 OBSCLK.

To get the clock output, you have to enable both OD1EN and OBSEN.

Regards,

Senthil

Hi Senthil,

I thought so too. However, the result was not so.
When I set 0x00000001 to OSCDIV, OBSCLK pin output 12MHz clock. (OSCIN is 24MHz.)
When I set 0x00000001 to CKEN, OBSCLK pin did not output the clock.

It seems that only OSCEN has the function as OBSCLK gate. OD1EN looks like no function.

If possible, could you check it on your side actually?

Best regards,
Keigo Ishii

Hello Keigo,

I will check this issue at my side and update you.

Regards,

Senthil

Hi Senthil,

Thank you! I will wait for your response.

Best regards,
Keigo Ishii

Can you also make sure that PLL MMRs access is not locked?

This is managed by bits in the CFGCHIP0.PLL_MASTER_LOCK bit in the SYSCFG module 

Hi Mukul,

PLL_MASTER_LOCK bit is set to 0.

Best regards,
Keigo Ishii

May be nothing. What processor are you using? Some processors derived from the OMAP-L137 do not support the OSCDIV register.

Hi Norman,

I'm using DA830. Silicon revision is 1.0, probably.
Does not this device support OD1EN bit?
I think there is not almost difference between the DA830 and OMAP-.L137.

Best regards,
Keigo Ishii

My thought was about processors after the OMAP-L137, eg. feature removed versions like the AM1705, C6745, C6743. The DA830 is before the OMAP-L137. I've assumed that the DA830 is the same as the OMAP-L137 but I once got a forum reply from a TI guy stating that they are not the same. I have some doubts about that. The DA830 is before my time with TI . TI has chosen to erase any details about the DA830. Cannot go back and review the tech docs. Hopefully a TI guy can state conclusively that the DA830 and the OMAP-L137 are exactly the same silicon with different markings.

Ishii-san, Norman

In the context of PLL and clocking (and OD1EN), there is no difference between OMAPL137 and DA830. 

There are subtle differences in package, ROM content and access-ability and what is supported/not supported between c6747/45, OMAPL137, DA830, they come from the same common architecture.

Ishii-san

On OD1EN, Senthil is investigating further and your observations so far look correct. After some additional verification on our side, this might require looking at PLL RTL design to understand the clock gates. This might take some more time.

At a high level, if we find that your observations are correct, this will mean a corrective action on the documentation. Is this impacting the end system functionality in some way though?

Regards

Mukul 

Hi Mukul,

Thank you for your hard support.

I think this will not impact it.
Even if my observations are correct, OBSCLK gating is available with using OBSEN bit only.

Best regards,
Keigo Ishii

Hello Keigo,

Thanks for your update.

Yes, you can gate the OBSCLK output by having OBSEN bit alone. 

Would you mind to close this thread by pressing Verify button ?

Regards,
Senthil

Hi Senthil,

Thank you for your investigating.

This is the final confirmation.
Does OD1EN bit have no function? It is the point I want to make sure.

Best regards,
Keigo Ishii

Hi Mukul,

Thank you for your reply.

Mukul said:

The recommendation from design is to leave the OD1EN bit always enabled, if you are using this functionality, even if it is a don't care to enable the clock.

OK, I see. I will explain it for my customer.

Mukul said:

Can you clarify what you/your customer is using this clock for?

I don't know what my customer will use this clock for, however I have already informed to him that the clock should be used for debug purposes only.
So, I think it will not become a problem.

Best regards,
Keigo Ishii