AM1808/L138 DDR2 256Mbyte support

ferdi tekce

Hi,

I have a custom designed board that has 128Mbyte DDR2( Micron MT47H64M16HR-3T ). I want to use 256Mbyte DDR2 (Micron MT47H128M16RT-25E).

After assemly process, i prepared a u-boot code (but this is same with 128Mbyte vesion) and generated an bin file using AISgen D800K008 for boot from UART.

But it doesn't work. Is there any example and document to increase DDR2 capacity?

Do i need to change u-boot for Uart boot mode?

In my design i connect DDR_A[13] and do i need to change Pinmux for this pin?

My new valuef for DDR2 register as follow:

Clock : 300 Mhz

DRPYC1R : 0x00000044

SDCR : 0x00134632

SDTIMR1 : 0x3A523209

SDTIMR2: 0x7C1EC722

SDRCR : 0x00000492

over 8 years ago

0 Biser Gatchev-XID over 8 years ago

TI__Guru**** 393215 points

Moving this to the AM18X forum.

0 Senthilkumar Srinivasan over 8 years ago

TI__Mastermind 43660 points

Hello Ferdi,

Welcome to the TI E2E forum. I hope you will find many good answers here and in the TI.com documents and in the TI Wiki Pages (for processor issues). Be sure to search those for helpful information and to browse for the questions others may have asked on similar topics (e2e.ti.com).

There is no specific document for increasing the DDR2 capacity. The device data manual has details in all the aspects.

No pinmuxing is required for DDR_A[13].

Was your design working fine for 128Mbyte DDR2 ?

Have you followed the schematic and layout guidelines given in the data manual ?

Regards,
Senthil

0 ferdi tekce over 8 years ago in reply to Senthilkumar Srinivasan

Prodigy 40 points

Hi,

Thanks for your quick response. My design works well with 128MByte and i followed all hw rules according to design guides.

Actually i read alot of documents but it doesn't work yet.

Thanks.

0 Titusrathinaraj Stalin over 8 years ago

TI__Guru** 116100 points

Hi,
I would like to suggest to work with gel file for new DDR part.
Modify the DDR timing registers in gel file and initialize it and then try to load programs to validate the memory.
Also you can read/write the DDR memory through CCS's memory browser.

0 ferdi tekce over 8 years ago in reply to Titusrathinaraj Stalin

Prodigy 40 points

I don't have CCS and a debugger for my design. Please suggest any other way without debugger.
When i prepare an uboot.bin file using aisGen, i have seen that it can load successfuly with UartHost.exe.
Where is the loading location DDR2 or internal cache?

0 Titusrathinaraj Stalin over 8 years ago in reply to ferdi tekce

TI__Guru** 116100 points

Hi,
Else, you can have LED blink code (code should be on DDR) and flash into NAND flash and do NAND boot then see LED blinking ?

How ever, validating new parts, JTAG is the best approach.

After assemly process, i prepared a u-boot code (but this is same with 128Mbyte vesion) and generated an bin file using AISgen D800K008 for boot from UART.

How did you validate your new DDR part ?
Have you modified the u-boot code for your new DDR part like changing timing register etc.,
Else, if u-boot doesn't have code for DDR,PLL etc., you may have to modify in AISgen settings.

0 ferdi tekce over 8 years ago in reply to Titusrathinaraj Stalin

Prodigy 40 points

Hi,
I don't change u-boot code and try to change AISgen setting. I do not have JTAG but i have working boards that have only 128 Myte DDR2.
Can you check my AisGen settings?
Regards.

0 Titusrathinaraj Stalin over 8 years ago in reply to ferdi tekce

TI__Guru** 116100 points

Hi,
Okay, please confirm that u-boot is not over writing the values.
You can check that it in board config file.
include/configs

0 Titusrathinaraj Stalin over 8 years ago in reply to Titusrathinaraj Stalin

TI__Guru** 116100 points

Hi,
Are you using any UBL code ?
Or directly boot from u-boot ?
Because, some times, UBL code would do the PLL and DDR setup.

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AM1808/L138 DDR2 256Mbyte support