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Micron or other larger DDR2?

Lencho DeLeon
Prodigy 80 points
Other Parts Discussed in Thread: OMAPL138

Hello,

We have used L138 with MT47H64M16HR 84pin DDR2 with 128MB memory. It is somehow limited and we would like to use larger memory like 512MB or above.

First, could TI recommend any compatible product? And is there EVM encompass the new memory so we can follow the reliable design?

 

Second, Micron MT47H128M16 has 256MB capacity and is 84pin and appears to be pin-to-pin compatible with evmomapl138 design. Has this memory IC be tested? Would it work with L138?

 

Regards,

Lencho

  • 0
    TI__Mastermind 43660 points
    Hello Lencho,

    The OMAPL138 supports 16Bit DDR2 SDRAM with 256MB address space only. You cannot use larger memory like 512MB or above.

    We have not tested MT47H128M16 DDR2 memory device in our EVM. However you could use this memory device in your design and ensure that you set the DDR configuration registers correctly to support this.

    Regards,
    Senthil
  • 0 in reply to Senthilkumar Srinivasan
    Prodigy 80 points
    Senthil,

    The datasheet shows internal banks information (1,2,4,8 for DDR2), 16 bit data width, page size up to 2048. Is this last 2048 page size results in the calculation result of 512MB? Otherwise 32bit in theory should address 4GB space?

    Lencho
  • 0 in reply to Lencho DeLeon
    TI__Mastermind 43660 points

    Hello Lencho,

    Could you please let me know your calculations from which you arrived, 2048 page size results in 512MB. The page size would be calculated as follows.

    Page size = Bits in the column address / 8

    Bits in the column address = 2 (n) × Width of data path

    n = number of column addresses

    Also let me know about your reference of 32 bit.

    Regards,

    Senthil

  • 0 in reply to Lencho DeLeon
    TI__Guru*** 125430 points

    Lencho DeLeon said:
    Senthil,

    The datasheet shows internal banks information (1,2,4,8 for DDR2), 16 bit data width, page size up to 2048. Is this last 2048 page size results in the calculation result of 512MB? Otherwise 32bit in theory should address 4GB space?

    Lencho

    Please see the Section 3.5 "Memory Map Summary" in the data manual.  Address range 0xC0000000 - 0xCFFFFFFF (256 MB) is mapped to the DDR2 controller.  Regardless of the number of pins/banks, etc. there is no possible way of getting the chip to actually send more than 256 MB worth of unique addresses to the DDR2 controller.