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Error: Erasing SPI failed

Other Parts Discussed in Thread: OMAP-L138

Hello,

i tried to write the SPI Flash on an OMAP-L138E (secure) processor with the SPI Writer, but i get the following error:

[C674X_0] Starting OMAP-L138 SPIWriter.
Will you be writing a UBL image? (Y or y)
n
Enter the application file name (enter 'none' to skip):
C:\SecureOut.bin
    INFO: File read complete.
    ERROR: Erasing SPI failed.
SPI Flashing Failed!    SPI flashing failed!

Any idea how i can fix this?

Thanks and regards

Thomas

  • Please make sure that you have modified the SPI memory configuration settings in SPI writer code.
    I presume that you are using custom board.
  • In the SPIWriter_DSP.cmd i found the memory configuration for the L2RAM, DRAM, SHARED_RAM, AEMIF, AEMIF_CS3.

    This seems that it fits to my board. Are there any other configurations which i can make?

  • Can you please modify the following file for your SPI flash ?
    C:\ti\OMAP-L138_FlashAndBootUtils_2.40\OMAP-L138\Common\src\device_spi.c
  • Hello Titus,

    I tried to change the configuration of my SPI flash, but i think i found the problem.

    The hSPIMEMInfo Variable shows in the debugger, that CCS cannot read at the specific adresses. So the problem is, that it does not goes into the erasing and programming section as it always drop out at:

    else if (hSPIMemInfo->hMemParams->memType == SPI_MEM_TYPE_FLASH)

  • Hi Thomas,


    Is this structure part of the data relocated from Flash to RAM at init time?
    It might not apply in your case but I have seen in the following E2E post that the UBL relocates the hSPIInfo structure:
    e2e.ti.com/.../1242078
    The SPIWriter app might assume that some boot code (UBL) might have place the structure at some given location but if you run the SPI Writer stand alone
    with CCS it might not be the case.

    Also I have seen a post that provides more info to port the SPI writer to a custom board:
    e2e.ti.com/.../354272

    Hope it helps.

    A.

  • Dear Thomas,
    In addition to AnBer suggestions,

    Can you please try to use the SFH tool (serial flash utility) to write the binary into SPI flash ?
    processors.wiki.ti.com/.../Serial_Boot_and_Flash_Loading_Utility_for_OMAP-L138
    Set boot mode to Serial and do the following command to erase the SPI flash.
    ./sfh_OMAP-L138.exe -erase

    Let me know if any issues.

    Please refer to the following wiki page for custom board changes.

    This is also applicable for SPIWriter code (CCS project)

    SPI Settings

    • OMAP-L138/Common/include/device_spi.h: Modify the global macros to select the appropriate peripheral and chip select numbers.
    • OMAP-L138/Common/src/device_spi.c: Modify the flash organization in DEVICE_SPI_MEM_params.
    • The SPI flash on the EVM does not need to be unlocked in order to erase or write. Some SPI flashes may need to set the BL bits before writing. Check the device datasheet to see if this step needs to be added to the initialization.


    processors.wiki.ti.com/.../Serial_Boot_and_Flash_Loading_Utility_for_OMAP-L138

  • Hi Titus,

    no it's not possible to use the SFH tool, because we are using the secure OMAP L138 processor. But if i'm using the AIS Gen Tool for unsecure devices and flash it with SFH into an unsecure processor it's up and running fine.

  • Hello AnBer,
    Where can i check if it's relocated or not? I can only see with the debugger that it cannot find the data at the shown location. As the SPIWriter Code is provided from TI I have no idea if this is done or not.
    Thanks for the additional information I will check if this will help me or not.
    BR Thomas
  • So, i checked the additonal links, but they are not helping me. Any other ideas?
  • Thomas,

    - Can you describe the setup you use? In what bootmode is the OMAP-L13x device? Are there any code that has been booted already? Is the OMAP-L13x running any code (except the ROM bootloader code) like UBL before you connect with CCS?
    I assume that you load the SPIWriter .out file from CCS over JTAG. Correct? How and when is done the device init (PLL, SDRAM, .etc) in this case? Via the GEL file or via UBL?
    I assume that you use a custom board. Correct?

    - What Flash device do you use? Have you made changes to the SPI driver (See Titus post) to ensure that the OMAP device can talk to the flash?
    Has the Flash any feature like lock that prevent it to be accessed?

    - Can you check in the SPIWriter code where (ie at what address) the element of the hSPIInfo struture are located? Is it in SDRAM (ie 0x8000xxxx)? In internal memory or does it refer to addresses located in the SPI flash directly?

    Titus,
    Do you have the SPIWriter installed? Could you check where this strutcure is located?

    Thanks,

    A.

  • Okay AnBer, will try and update.
  • Here is the information.

    Linker command file used.

    -stack          0x00000800 /* Stack Size */  

    -heap           0x00000800 /* Heap Size */

    MEMORY

    {

     L2RAM    org=0x11800000 len=0x00040000 /* DSP L2 RAM */

     DRAM        org=0xC0000000 len=0x04000000 /* SDRAM */

     SHARED_RAM  org=0x80000000 len=0x00020000 /* DDR for program */

     AEMIF       org=0x60000000 len=0x02000000 /* AEMIF CS2 region */

     AEMIF_CS3   org=0x62000000 len=0x02000000 /* AEMIF CS3 region */

    }

    SECTIONS

    {

     .text :

     {

     } > SHARED_RAM

     .const :

     {

     } > SHARED_RAM

     .bss :

     {

     } > SHARED_RAM

     .far :

     {

     } > SHARED_RAM

     .stack :

     {

     } > SHARED_RAM

     .data :

     {

     } > SHARED_RAM

     .cinit :

     {

     } > SHARED_RAM

     .sysmem :

     {

     } > SHARED_RAM

     .cio :

     {

     } > SHARED_RAM

     .switch :

     {

     } > SHARED_RAM

     .aemif_mem

     {

       . += 0x1000;

     } load = AEMIF, FILL=0x00000000, type=DSECT, START(_NORStart)

     .extram

     {

       . += 0x04000000;

     } load = DRAM, FILL=0x00000000, type=DSECT, START(_EXTERNAL_RAM_START), END(_EXTERNAL_RAM_END), SIZE(_EXTERNAL_RAM_SIZE)

    }

  • Hello AnBer,

    I use an OMAP-L138E Processor. This is the secure one from the OMAP-L138 series. With this one its necessary to

    1) Boot via Secure UART Boot Tool and enable the JTAG 

    2) To run the SPI Writer with CCS in debugmode on the processor and write the final file to the SPI RAM.

    So do I. I boot with UART Boot Tool and try to flash my SW with the SPI Writer with CCS in debug mode.

    For the board we are using a Critical Link MityDSP OMAP-L138 board and have changed the processor. So we know that our configuration of the memory is working and the DDR too. (we are using in parallel the unsecure Processor to run our software in a prototype, but we want to run it for the serie in a secure device)

    For the screenshot from Titus i have to say, that he runs it on an OMAPL-137 processor, which is non secure. So please Titus is it possible that you are using a secure processor too?

    If i look on your screenshot and on mine (which i postet some posts before) I see that with your processor it's possible that you access the memory where the settings should be located. But thats exactly my problem. It seems that the configuration is written in a memory area which can not be accessed and i don't know the reason for that.

    Best regards 

    Thomas