Tool/software: Linux
Hello TI team,
I am working on Linux device driver updates/customization for our custom board based on OMAP-L138. I have CS2 32MB NOR (16bit S29GL256S) and CS3 1GB NAND (8bit MT29F8G08ABABAWP) connected via AEMIF. I am booting from NOR using direct NOR boot and do not have NAND set via uBoot. Once I have enabled MTD + NAND drivers in Linux kernel (4.9.10). I set everything using http://processors.wiki.ti.com/index.php/Linux_Core_NAND_User's_Guide
I believe I have Pinmux set correctly:
nand_pins: nand_pins {
pinctrl-single,bits = <
/* EMA_WAIT[0], EMA_OE, EMA_WE, EMA_CS[3] */
0x1c 0x10110010 0xf0ff00f0
/*
* EMA_D[0], EMA_D[1], EMA_D[2],
* EMA_D[3], EMA_D[4], EMA_D[5],
* EMA_D[6], EMA_D[7]
*/
0x24 0x11111111 0xffffffff
/* EMA_A[1], EMA_A[2] */
0x30 0x01100000 0x0ff00000
/* NAND_WP - GPIO06_10 */
0x34 0x00800000 0x00f00000
>;
};
And AEMIF settings:
&aemif {
pinctrl-names = "default";
pinctrl-0 = <&nand_pins>;
status = "okay";
cs3 {
#address-cells = <2>;
#size-cells = <1>;
clock-ranges;
ranges;
ti,cs-chipselect = <3>;
nand@2000000,0 {
compatible = "ti,davinci-nand";
#address-cells = <1>;
#size-cells = <1>;
reg = <0 0x02000000 0x02000000
1 0x00000000 0x00008000>;
ti,davinci-chipselect = <1>;
ti,davinci-mask-ale = <0>;
ti,davinci-mask-cle = <0>;
ti,davinci-mask-chipsel = <0>;
ti,davinci-nand-buswidth = <8>;
ti,davinci-ecc-mode = "hw";
ti,davinci-ecc-bits = <4>;
ti,davinci-nand-use-bbt;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot env";
reg = <0 0x020000>;
read-only;
};
partition@0x020000 {
label = "free space";
reg = <0x020000 0x3FFE0000>;
};
};
};
};
};
NOR works correctly. Unfortunately, when I enabled MTD+NAND, I am getting Linux crash during booting. Crash occurs in davinci_nand.c->nand_davinci_hwcontrol->iowrite8(cmd, nand->IO_ADDR_W); Its seems that CS3 address (0x6200000) data, reallocated to virtual address (In my case to 0xc8a00000) is not accessible and when I read/write to this location kernel immediately crashes. I was suspecting PSC for AEMIF, but it seems to be always enabled and running (I tried PLL0_SYSCLK3 settings in range from 25MHz to 100MHz). My question is, is there any way to disable/enable particular CS? Or ensure is it running? What could actually leads to situation I am able to access 0x68000000 (AEMIF Control registers), when whenever I touch 0x62000000 I got immediately crash. Could this be even HW wiring problem? Could this be caused that uBoot sets the AEMIF during the uBoot and during Linux kernel boot I want to access/setup the NAND access?
If you need any other information, let me know.
Thanks,
Michal
Wiring is following:
