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Linux: DMA pending Errors when SPI0 used in EDMA0 core

Other Parts Discussed in Thread: OMAPL138

Tool/software: Linux

Hi there, I am using OMAPL138 SoC;

This is with Linux running on the ARM Core. The SDK is v4.0.0.4 and Linux is 4.9.28

In the DSP Core, I am using SPI0 to transfer data using the EDMA0 queue 14 and 15. WHen enabled I am getting following errors in the Linux log:

edma 1c00000.edma: dma_ccerr_handler: Error interrupt without error event!
edma 1c00000.edma: dma_ccerr_handler: Error interrupt without error event!
edma 1c00000.edma: dma_ccerr_handler: Error interrupt without error event!
edma 1c00000.edma: dma_ccerr_handler: Error interrupt without error event!
edma 1c00000.edma: dma_ccerr_handler: Error interrupt without error event!
edma 1c00000.edma: dma_ccerr_handler: Error interrupt without error event!

edma 1c00000.edma: dma_ccerr_handler: Error interrupt without error event!

edma 1c00000.edma: dma_ccerr_handler: Error interrupt without error event!
edma 1c00000.edma: dma_ccerr_handler: Error interrupt without error event!
edma 1c00000.edma: dma_ccerr_handler: Error interrupt without erro

Any idea, if I need to disable SPI0 in the Linux device tree? or what could be he reason of the error?

Thanks.

Regards,

Mitesh

  • You might have to reserve those EDMA channels. The code  is in the board file:

    ////// arch/arm/mach-davinci/board-da850-evm.c ////////
    /*
     * The following EDMA channels/slots are not being used by drivers (for
     * example: Timer, GPIO, UART events etc) on da850/omap-l138 EVM, hence
     * they are being reserved for codecs on the DSP side.
     */
    static const s16 da850_dma0_rsv_chans[][2] = {
    ...
    };
    
    static const s16 da850_dma0_rsv_slots[][2] = {
    ...
    };
    
    static const s16 da850_dma1_rsv_chans[][2] = {
    ...
    };
    
    static const s16 da850_dma1_rsv_slots[][2] = {
    ...
    };

  • Hi,

    Sorry for the late reply, I've missed this. Norman is correct Try reserving the EDMA channels.

    Best Regards,
    Yordan