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AM1808: DDR2 TIMING Waveform

Sudarshan KR
Intellectual 840 points
Part Number: AM1808
Other Parts Discussed in Thread: AM1802

Hi,

When we have run the simulation on the DDR2 interface we are  seeing ringing on the Address lines which we are trying to address without adding the series resistance due to space constraints.

Is there a DDR2 timing waveform w.r.t AM1808 side across CK, Address, Data signals.  I have searched both the AM1808 datasheet as well as the Technical Reference manual but couldnot get the details.

Are is there any way to adjust the delay between the Clock and the Address signals. 

Regards,

Sudarshan

  • 0
    TI__Mastermind 29210 points
    Hi Sudarshan,

    I am looking for any document with the DDR2 signals... You can refer to the JEDEC specification JESD79-2A, which AM1808 DDR is compliant to.

    I'm not aware of any software method to delay the address signals relative to the clock, but you could add trace, assuming you still meet the layout requirements.

    Or are you referring to slowing the signal slew rate in order to reduce ringing?

    Regards,
    Mark
  • 0 in reply to Mark Mckeown
    Intellectual 840 points

    Hi Mark,

    Thanks for your feedback. As i had mentioned  in my earlier mail we are observing the Ringing on the Address waveforms. Is there any method in the layout Or any register settings that can be adopted to eliminate the ringing without adding any series termination(Not possible due to space constraints).

    Regards,

    Sudarshan

  • 0 in reply to Sudarshan KR
    TI__Mastermind 29210 points

    Hi Sudarshan,

    The DDR controller on the AM1802 has a DDR Slew Register (DDR_SLEW), but all modes are reserved except for "Slew rate control is off". Slew rate control is not supported on this device. (Refer to the TRM: www.ti.com/.../spruh82c.pdf)

    Is the ringing a result of signal reflections from the DRAM? What terminations are implemented?

    If you cannot add any series resistors, maybe you can adjust the controlled trace impedance to attenuate ringing? Can you control the trace impedance and re-simulate?

    Refer to High-Speed Layout Guidelines SCAA082A for techniques to reduce reflections.

    Hope this helps,
    Mark

  • 0 in reply to Mark Mckeown
    Intellectual 840 points

    Hi Mark,

    Sorry for the delay in reply. Currently we have released the board as is due to timeline issues. In the next version of the board we will be providing provision for Termination resistors only on Address and Control lines.

    Regards,

    Sudarshan