Hi,
I am reviewing a board design that uses the OMAP-L138. The goal is for the board to support both the 375 MHZ and 456 MHz speed grade parts.
There was another post, http://e2e.ti.com/support/dsp/omap_applications_processors/f/42/p/90534/314413.aspx#314413, that basically says that the RVDD may be connected to the CVDD supply so long as DVFS is not used.
Can you clarify this? For example, if we constrain the minimum core voltage to 1.2 V with DVFS and transition from 300 to 456 Mhz and back such that the supply transisions from 1.2 to 1.3 (and back to 1.2), is this an illegal form of operation? We would like the option of reducing as much power as needed during known periods of idle time, but would prefer not to add an additional supply for RVDD in order to accomplish this.
Also, this board was intended to be compatible with the AM1808 processor, but the specs for the RVDD pin for that processor are 1.2 or 1.26 volts, with no mention/conditions on the 1.3 volt (456 MHz) operating point. Does the AM1808 spec for RVDD need to be updated, or are the 456 MHz parts not pin compatible?
Thanks.
-Mike