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EMIFA
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  • Forum Post: OMAPL138 EMIFA NAND Flash Performance

    Alper YILDIRIM
    Hello, I have a custom OMAPL138 based board which has a 256MB Micron nand flash (MT29F2G08AAC). I use the same connections as the L138 EVM UI board. I use the kernel from arago git tree. (http://arago-project.org/git/projects/?p=linux-omapl1.git;a=summary) I am trying to optimize the nand read...
    on Jul 13, 2010

  • Forum Post: External memory best use on OMAPL138

    Jonathan Journo
    Hello, We are developping an application on the OMAPL138 that make the use of the ARM and DSP core separately because they are doing different tasks. We planed to use Linux as GPP OS and DSP/BIOS for DSP. Codec Engine was not a good solution for us so instead we decided to use DSPLINK directly to...
    on Aug 5, 2010

  • Forum Post: OMAP-L138 EVM EMIF-A interrupt examples

    Don Froese
    I am just starting out with a OMAP-L138 EVM using the TMS320C6748 DSP. I want to connect an external FPGA and I plan to use the EMIF-A connector for this purpose. Are there any coding examples of how to access the EMIF? Specifically I would like to see an example of how to set up an ISR to respond to...
    on Sep 29, 2010

  • Forum Post: C6747 EMIFA Read External DPRAM (FPGA Internal) Speed ?

    longbin qiao
    Hi, My C6747 Run @ 300M , CACHE :L1P=32K,L1D=32K,L2=64K. EMIFA_CS4 Connected to the DPRAM(FPGA Internal), I use EDMA read DPRAM 800 bytes to L2_SRAM with 114 us . I think this speed is still slow, How to improve the speed? Setup_EMIFA: /* Setup CS4 - 8-bit normal async */ AEMIF_A3CR = 0x00a00504;...
    on Oct 5, 2010

  • Forum Post: OMAP-L137 EMIFA DQM Lines- How are they mapped in memory?

    rusty_shackleford
    Newbie question on the EMIFA: I am using EMIF A to map to an external 16-bit Async RAM. Beside the A[0:12] and BA[0:1] lines, the DQM's can be used as byte selects. My question is, how are they used? I know that in 16-bit mode: the L137's BA[1] maps to the external device's A[0] ...
    on Nov 5, 2010

  • Forum Post: Re: EMIFA and NAND ECC

    Daniel Allred
    Vladimir, This is exactly how the ECC hardware is expected to be used. So, using a device with 2048 byte pages, you would use the ECC hardware 4 times to read the data from that page. there are various example implmentations of this usage available, including in the Linux kernel source delivered with...
    on Nov 22, 2010

  • Forum Post: Get Davinci AEMIF NAND flash timings from NAND part datasheet?

    Ben Gardiner
    I would like to know how to translate the timings specified in a NAND part datasheet into nanosecond perios of turn-around, write- setup, strobe, hold and read- setup, strobe, hold. I've looked at the patch submitted by Sekhar Nori , where the timings were calculated by Mukul Bhatnagar but I have...
    on Apr 1, 2011

  • Forum Post: Just some Nand and EMIFA questions regarding ECC usage on OMAPl138

    Kevin the almighty
    We are using an 8-bit micron 4Gb micron flash device, it has internally 5 bit error detection and 4 bit error correction. It allows 1 partial page write per ecc area, so our 2048 sector can be split up into four 512 byte writes and still use the internal ECC correctly. The OMAPL138 has 4 bit something...
    on Oct 5, 2011

  • Forum Post: Re: NOR FLASH on OMAP-L138

    Boris Ruvinsky
    Hi Joe. Thank you very much for your help. Boris
    on Nov 8, 2011

  • Forum Post: Where are the McBSP, uPP and EMIFA drivers for the C674x of OMAP-L138 ?

    Eric LOUVEL
    Hi, I'm working with the DSP on a OMAP-l138 EVM eXperimeter from LogicPD. I'm looking for the implementation of McBSP, uPP and EMIFA drivers for the OMAP-L138 EVM. Where I can found it ? For example, I have evmomapl138_uPP.c with only UPP_init() function (no UPP_configure() , UPP_read...
    on Mar 12, 2012

  • Forum Post: Data transfer through EMIF with EDMA for OMAP L138

    Xu Tong
    Hello, I would like to transfer buffer data out to the EMIF by EDMA for the OMAP L138, and the transmission is controlled by ARM side under Linux OS. In order to simplify the testing, buffer size is set to 24bytes, AB-synchronization is used. The PaRAM settings are as follow: acnt = 2 ...
    on Apr 13, 2012

  • Forum Post: EMIFA EMA_WAIT timing

    Jean-Francois Herminjard
    I have to use the EMIFA bus in asynchronous mode to interface an FPGA (through an Avalon master bridge). I need the maximum speed as possible for this interface and I have to manage the EMA_WAIT signal because, in some case, data are not ready immediately. The timing requirements for EMIFA (sprs586c...
    on Apr 18, 2012

  • Forum Post: Asynchronous Reads with Wait on EMIF

    Derick Voegeli
    I am having a problem in getting the L138 EMIF bus to hold a cycle until wait is removed. I am working on a AVNET spartan 6/OMAP L138 eval board, which uses CS2. The bus cycle completes while EMIF_WAIT is still asserted. All the other signals seem correct and the data does get to the bus within the wait...
    on Apr 10, 2012

  • Forum Post: C6746 EMIFA Asynchronous Memory Write Operation Issue

    Daisuke Maeda
    Our customer has a issue. It is that the order of Asynchronous Memory Write and GPIO Output is changed. In the program code, the order as follows. 1. 1st Memory Write 2. 2nd Memory Write 3. 3rd Memory Write 4. 4th Memory Write 5. GPIO Output is High In The timing of the output signals, during the...
    on Sep 21, 2012

  • Forum Post: Using EMA_WAIT with asynchronous memory and NAND flash

    Butters
    Hello, and thanks in advance for reading my question. I have been reading the OMAP-L138 Datasheet and Technical Reference Manual, but I have not been able to find information on how the EMA_WAIT0 signal is used in the following situation: NAND flash is connected to EMIFA CS3, and EMA_WAIT0 is connected...
    on Aug 29, 2012

  • Forum Post: Connect OMAP-L138 to ethernet switch KSZ8842-16MQ

    Phoenix1
    Hello everyone, Can I connect OMAP-L138 to ethernet switch KSZ8842-16MQ (which has Generic host interface ) through EMIFA ? Or need to use HPI interface? Thanks, Ilya
    on Oct 25, 2012

  • Forum Post: OMAP-L138 EMIFA in Extended Wait Async mode - delayed strobe deassertion

    fdm
    Hi, The OMAP-L138 DS states that the "Delay time from EMA_WAIT deasserted to EMA_OE high" ( td(EMWAITH-EMOEH) parameter 11 in Table 5-24 and Figure 5-15) should be in 3E-3 to 4E+3 range with 4E nominal value, where E = EMA_CLK period. The same values are for EMA_WE (parameter 25). However...
    on Oct 10, 2012

  • Forum Post: AM1806 – LCD + SDRAM on EMIFA

    BillyO
    Hi team, I am looking for confirmation for a customer question on the AM1806: " We use a parallel interface LCD (with built in controller) and execute code out of SDRAM. Can I place both of these devices on the EMIFA data bus? " I looked around and understand you can have...
    on Dec 5, 2012

  • Forum Post: OMAPL138 EMIFA NOR Flash and GPIO

    Jaime Ferra
    Hi, I'm currently working a project for which we use the OMAPL138 processor. My current task is to interface with a Micron NOR Flash (64Mx16bit) memory device for which I'm developing the NOR software libraries. The NOR Flash vendor already provides a low level driver which I intend to re-use...
    on Jan 30, 2013

  • Forum Post: C6748 verify EMIFA asynch can access 32MB per CSx? Data sheet figure 5-10 shows GPIO used for upper page access?

    Marc DAmato
    Team, Can you verify C6748 EMIFA can access 32MB / CSx? From the data sheet and terminal functions it clearly shows EMIFA can access 16Mx16 (32MB) but figure 5-10 shows NOR access using only 13bits of address + GPIO for upper page access. Thanks. Marc
    on Mar 8, 2013

  • Forum Post: EMIFA Asynchronous Interface Output delay time

    Daisuke Maeda
    http://www.ti.com/lit/ug/sprufv0a/sprufv0a.pdf Table 56. AC Characteristics for a Read Access (Page 79) tD (Output delay time) is defined for the Asynchronous Interface. Is this delay time applied in other cases for the Asynchronous Interface? Best regards, Daisuke
    on Mar 18, 2013

  • Forum Post: EMIFA Data Bus Parking timings

    fdm
    Hi, I can't find any timings related to Data Bus Parking feature of the EMIFA module in data sheets (e.g. for OMAP-L138, TMS320C6745 etc). TRM (e.g. section 20.2.6 of SPRUH77A ) says that "After the EMIFA latches the last read data, it immediately parks the data bus again" . Does "...
    on Oct 12, 2012

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