Hello,
I am new with OMAP3530 programming, I am working on CCS3.3 and I choose to program directly the registers (without CSL, etc.)
I am trying to make a loopback (digital loopback) with the McBSP2 (where dr and dx pins are linked) I have configured the McBSP registers and I have 2 arrays, transmit[] and receive[].
In a loop, I wait for XRDY signal before writing a transmit[n] data to DXR, then I wait for RRDY signal to read data from DRR register. And DRR register never takes one of my array values; in fact DRR value is always 0.
And now my questions:
I would like to know if there is a specific way to write the McBSP DXR register.
I mean, do I need to use DMA to write and read McBSP transmit and receive registers or could I write directly into DXR register ? And how could I know if the write process has been done correctly (DXR is a write only register, I can’t print its value) ?
I have probably missed something with the McBSP loopback programming…
Thanks,
Michael
PS : Here is how I have configured the register for a digital loopback on McBSP :
The clocks are provided by the PRCM
CONTROL_DEVCONF0 &= 0xFFFFFFBF //CLKS is from the PRCM functional clock
CM_FCLKEN_PER |= BIT_00_MASK; // 96M
CM_ICLKEN_PER |= BIT_00_MASK; // L4
MCBSPLP_SPCR2_REG = 0x00000000
MCBSPLP_SPCR1_REG = 0x00000000
MCBSPLP_RCR2_REG = 0x00000001
MCBSPLP_RCR1_REG = 0x000000A0
MCBSPLP_XCR2_REG = 0x00000001
MCBSPLP_XCR1_REG = 0x000000A0
MCBSPLP_SRGR2_REG = 0x00002000
MCBSPLP_SRGR1_REG = 0x00000101
MCBSPLP_PCR_REG = 0x00000A00
MCBSPLP_THRSH2_REG = 0x00000001
MCBSPLP_THRSH1_REG = 0x00000001
MCBSPLP_IRQSTATUS_REG = 0x0000FFFF
MCBSPLP_XCCR_REG = 0x00009028
MCBSPLP_RCCR_REG = 0x00000808
Then I configure the SRG, following the flow diagram from the datasheet (page 2964) :
MCBSPLP_SPCR2_REG &= 0xFFFFFFBF // GRST = 0
MCBSPLP_PCR_REG &= 0xFFFFFF7F // SCLKME = 0
MCBSPLP_SRGR2_REG &= 0xFFFFDFFF // CLKSM = 0
MCBSPLP_SRGR2_REG &= 0xFFFF7FFF // GSYNC = 0
MCBSPLP_SRGR2_REG |= 63 // FPER = 63
MCBSPLP_SRGR1_REG = 0
MCBSPLP_SRGR1_REG |= 0x1F00 // FWID = 31
MCBSPLP_SRGR1_REG |= 7
I enable the SRG :
MCBSPLP_SPCR2_REG |= 0x40 // GRST=1
MCBSPLP_SPCR2_REG |= 0x80 // FRST=1
Finally, I enable MCBSP transmit and receive
MCBSPLP_SPCR1_REG |= 0x1 // RRST = 1
MCBSPLP_SPCR2_REG |= 0x1 // XRST = 1
Yeah i see that they dont work on linux environment :))
So can you explain me how can i work with that codes or I am gonna use Angstrom or Ubuntu on my Beagleboard with OMAP3530 how can i try these codes onto them?
Thanks in advance
Fozay
Steve has replied to the othere thread (http://e2e.ti.com/support/dsp/omap_applications_processors/f/447/p/47984/220684.aspx#220684).
Paul
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Paul,
I am pretty new basically first time dealing with OMAP Processor and CCSv4.x . I tried to use your loopback example. It builds successfully, But However, it doesn't load program on target.
Following are my development environment:
1. Mistral OMAP3530 EVM Rev G Board
2. CCSv4.x
3. Spectrum Digital USB 510 Plus JTAG Emulator
Thru Multi launcher I can boot the board it has Xloader 1.42 and U-Boot 2008.10.
I am trying to load the program thru CCSv4.x. I am able to connect the target but when I am trying to Debug Active Project it complains about in console.
TMS320C64XP: Error connecting to the target: Error 0x80000260/-1178 Fatal Error during: Execution, Initialization, OCS, The target does not have a CPU clock.
I am not sure where I am going wrong. is it somehting to do with setting up correct *.gel file or Target ocnfiguration file.. (*.cxml)...
Please would be able to tell me how you were able to load the program on target and debug it...?
Please any help would be appreciated.
AD
ADD
Attached is a document that I created for setting up and using CCS V4.
In your case you would make the following changes in the target configuration:
- Connection: Spectrum Digital XDS510USB Emulator - Device: MISTRAL_OMAP3530_XDS510USB
This should allow you to connect and download to the target.
Thanks! I tired the steps as noted in the document. Only thing I changed was instead of Hello World program I used your Loopback example as code.
Bu tI am still getting error in loading the program. Below I have noted what are my environment and steps.
2. CCSv4.1.2
I creatred the Target Configuration file with
Than I created New Project with your given Loopback example file. I have attached the example. After that I build the project. "binaries were created successfully Ican see the "*.out" file. After that "TI Launch Debbuger" which was successful. After that I connected Target which was successful. After that I execute 'Scripts->OMAP35xx Functions->C64xPlusRelease_FromReset' (based on the given thread - http://e2e.ti.com/support/development_tools/code_composer_studio/f/81/t/49722.aspx?PageIndex=2) After that I tried loading the program (*.out) file. And than I got error saying Failed to load Program '....*.out' 'on target 'MISTRAL_OMAP3530_XDS510USB_0/Cortex_A8' "REason : Error found during versification. Ensure the linker command file matches the memory map. Refer to the console View for specific address information."
I have also copied below the console message for the entire process....
Cortex_A8: GEL Output: The code download over AHB is turned OFF.
Cortex_A8: GEL Output: CPU Reset callback function has fired
Cortex_A8: GEL Output: OMAP 32K Watchdog Timer is disable
Cortex_A8: GEL Output: Setup PRCM clock configuration IIA
Cortex_A8: GEL Output: CORE_DPLL_CLK = 663.771 MHz
Cortex_A8: GEL Output: CORE_CLK = 331.8855 MHz
Cortex_A8: GEL Output: L3_CLK = 165.9427 MHz
Cortex_A8: GEL Output: MM01: mDDR Samsung K4X51323PC - 512 Mbit(64MB) on CS0, 4M x 32bit x 4Banks
Cortex_A8: GEL Output: SDRC initilization for mDDR_Samsung_K4X51323PC completed
Cortex_A8: GEL Output: GEL StartUp Complete.
Cortex_A8: GEL Output: C64x+ release from reset
Cortex_A8: GEL Output: MMU and Cache are OFF.
Cortex_A8: GEL Output: The code download over AHB is turned ON.
Cortex_A8: Loader: One or more sections of your program falls into a memory region that is not writable. These regions will not actually be written to the target. Check your linker configuration and/or memory map.
Cortex_A8: File Loader: Data verification failed at address 0x00000000 Please verify target memory and memory map.
Error found during data verification.
Ensure the linker command file matches the memory map.
I am ont sure where I am going wrong. Also not sure how to match linker command file which I dont hav eone....? to match with memory map which was automatically created. I am sending you the attached entire project which i am trying to load. Any help would be appreciated. Alos I have attached the "Target configuration file" and gel files used were ..Mistral_Omap35xx_CortexA8.gel and sdomap35xx_C64plus.gel.
2781.OMAPWorkspace.zip
1258.target config file created.zip
Thanks!
I'll look at your files shortly. However, if you do not have a linker command file then this is a problem.
Steps 11 & 12 in the guide creates the linker command file. Look at the end of the "How To" document and you'll find an simple linker command example that will work for these examples.
Once the linker command file is created, re-compile and download your project - Step 13.
Run the example - step 14.
You should not need to run any gel files in addition to those automatically executed as these examples run on the ARM.
Try this and let me know what happens.
I added the Command Linker file. Was able to build the project successfully. After that I clicked on "Green Bug" which states "Debug Active Project".
It didnt prompted any warning but when I see on "DEbug" window. it didnt halted at "main" and instead it halted at "0 c_int00() at boot.asm:200 0x80003444 under "Thread [main] (Running)". And I dont see any other activity on nay windows. I am not sure in what state it is.....? I have attached the image file of the CCSv4 screen after I hit "Green Bug".
Also I wanted to ask question why you mentioned in earlier thread that all examples run on ARM ....? and why cant we do that on DSP.....Why we dont select "C6000" as Project Type and Devic Variant as "C64x+" while creating New Project. Sorry for asking you so many questions but I am pretty new to this processor and development.
Thanks for your help.
When the emulator connects to a runnin host like you show, the simplest thing to do is reset the board and stop the boot process at the u-boot prompt. Now re-download the program to the device and all should be good.
I only mention that these are ARM example since I only developed them on the ARM processor. For specific DSP help I would start a new thread for your questions and someone with more experienced with the DSP provide the answers.
No problem asking questions, it's a great way to learn!
Thanks! But I am not sure how to stop the boot process at u-boot prompt...?
In my project I need to load the program on DSP. McBSP1 on DSP should be able to TX/RX communicate to FPGA.
Thanks alot for your example. So I was able to load and run the program on ARM side.
Now I want help in loading program on DSP. Where should I post my question on which forum thread...?
Arti
Great, I'm glad I could help.
For your DSP question, start a new thread in this forum and you should be good.
Thanks!! I will try to post new thread on DSP.
One more question If working on ARM only can I work on with more than one McBSP Port. As in what we planning to do here is.
Try to receive at external signal form FPGA at McBSP1 and than send it through McBSP1 tx to FPGA. ( I think I can achieve is just by disabling digital loopback in ur example)
Other test is to routing whatever I send out form McBSP1 I receive it on McBSP2 Rx and what ever I transmit from McBSP3 receive it on McBSP1 rx... but when I am trnsmittin gI am transmitting to FPGA... FPGA side is taken care... I nee dto handle this scenario on ARM side... any idea to get started would help.
The example is very simple and configures McBSP1 as a 4-pin McBSP which results in synchronous transmit/receive. I suspect that you would want the 6-pin asynchronous mode for your test With the receivers configured as slave and the transmitter configured as master.. Also, the example transmits then receives, sounds like you will need it the other way around. So, with some modification, you could have the code do what you want.
The more complex example is possible.
McBSP1 master transmitter --> McBSP2 SlaveMcBSP3 master --> McBSP1 Slave receiver.
The McBSP master will source the CLK and Frame Sync.